Week In Review: Design, Low Power

By Jesse Allen - 31 May, 2019 - Comments: 0

M&A NXP will acquire Marvell's Wi-Fi Connectivity business in an all-cash, asset transaction valued at $1.76 billion. The deal includes the Wi-Fi and Bluetooth technology portfolios and related assets; the business employs approximately 550 people worldwide. The deal is expected to close by calendar Q1 2020. Tools Cadence unveiled a data center-optimized FPGA-based prototyping system, ... » read more

The Week In Review: Design

By Jesse Allen - 09 Jun, 2017 - Comments: 1

Tools Mentor added new tools to its high-level synthesis portfolio. The DesignChecks tool helps find bugs during coding with a static mode that performs very fast linting-like checks of the code and a formal mode that uses a formal engine for a more exhaustive proof of issues. The synthesis-aware Coverage tool measures code coverage for C++ signoff and fast closure of synthesized RTL. It sup... » read more

Blog Review: April 15

By Jesse Allen - 15 Apr, 2015 - Comments: 0

How much memory do you need to look 13 billion years in the past? Rambus' Aharon Etengoff ponders the Square Kilometre Array's massive number of radio telescopes and what it means for computing. NXP's Martin Schoessler argues that for smart cities to work for their citizens, both technology companies and government entities will need a new mind-set. Reinventing the wheel is a good thing i... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: PCI-SIG

Week In Review: Design, Low Power

The Week In Review: Design

Blog Review: April 15