Streamlining Failure Analysis Of Chips


Experts at the Table: Semiconductor Engineering sat down to discuss how increasing complexity in semiconductor and packaging technology is driving shifts in failure analysis methods, with Frank Chen, director of applications and product management at Bruker Nano Surfaces & Metrology; Mike McIntyre, director of product management in the Enterprise Business Unit at Onto Innovation; Kamran Hak... » read more

IC Reliability Burden Shifts Left


Chip reliability is coming under much tighter scrutiny as IC-driven systems take on increasingly critical and complex roles. So whether it's a stray alpha particle that flips a memory bit, or some long-dormant software bugs or latent hardware defects that suddenly cause problems, it's now up to the chip industry to prevent these problems in the first place, and solve them when they do arise. ... » read more

Getting A Clearer Picture


Scan test diagnosis is an established software-based methodology for localizing defects causing failures in digital semiconductor devices. Using structural test patterns (such as ATPG) and the design description, diagnosis turns failing test cycles into valuable data. Exactly how valuable this data is depends on the quality of the diagnosis results. A result that points to a small group of nets... » read more