A Highly Wasteful Industry

By Brian Bailey - 25 May, 2023 - Comments: 1

The systems industry as a whole is not concerned about power. I know that is a bold statement, but I believe it to be true. The semiconductor industry is mildly concerned, but only indirectly. They care about power because thermal issues are limiting the functionality they can squeeze onto a chip, or in a package. Some users, such as data center operators, claim to care about power because i... » read more

How The Electronics Industry Can Shape A More Sustainable, Energy-Efficient World

By Piyush Sancheti - 21 Dec, 2022 - Comments: 0

By Piyush Sancheti and Godwin Maben We’re already experiencing the effects of our world’s changing climate—devastating wildfires, prolonged droughts, torrential flooding, just to name a few examples. Global energy consumption is increasing, raising carbon dioxide levels and triggering extreme weather conditions. Two key forces driving these trends are the shift to hyperscale datacenter... » read more

Efficient Gated Clock Design Approach for LFSR

By Technical Paper Link - 20 Dec, 2022 - Comments: 0

A technical paper titled "A Novel Clock Gating Approach for the Design of Low-Power Linear Feedback Shift Registers" was published by researchers at Università degli Studi di Catania, Italy. Abstract "This paper presents an efficient solution to reduce the power consumption of the popular linear feedback shift register by exploiting the gated clock approach. The power reduction with respec... » read more

Accelerating IoT Designs: Designing For Low Power In The Era Of Smart Everything

By Ron Lowman - 10 Nov, 2022 - Comments: 0

Most of us have become accustomed to interacting with the ubiquitous technology ecosystem daily (if not hourly). From fitness trackers, smart vacuums, and semi-autonomous vehicles to the smart home devices that wake us up every morning, there’s no denying that the internet of things (IoT) boom has proliferated in every aspect of our lives. At the core of this instant, at-our-fingertips conn... » read more

Designing for FPGA Accelerators

By Technical Paper Link - 31 Aug, 2022 - Comments: 0

This research paper titled "High-Level Synthesis Hardware Design for FPGA-based Accelerators: Models, Methodologies, and Frameworks" was published by researchers at Università degli Studi di Trieste (Italy), Universidad Nacional de San Luis (Argentina), and the Abdus Salam International Centre for Theoretical Physics (Italy). According to the paper's abstract, "This paper presents a survey ... » read more

AI Power Consumption Exploding

By Brian Bailey - 15 Aug, 2022 - Comments: 2

Machine learning is on track to consume all the energy being supplied, a model that is costly, inefficient, and unsustainable. To a large extent, this is because the field is new, exciting, and rapidly growing. It is being designed to break new ground in terms of accuracy or capability. Today, that means bigger models and larger training sets, which require exponential increases in processin... » read more

Distilling The Essence Of Four DAC Keynotes

By Brian Bailey - 28 Jul, 2022 - Comments: 0

Chip design and verification are facing a growing number of challenges. How they will be solved — particularly with the addition of machine learning — is a major question for the EDA industry, and it was a common theme among four keynote speakers at this month's Design Automation Conference. DAC has returned as a live event, and this year's keynotes involved the leaders of a systems comp... » read more

Review of Bumpless Build Cube Using Wafer-on-Wafer & Chip-on-Wafer for Tera-Scale 3D Integration

By Technical Paper Link - 20 Jun, 2022 - Comments: 0

New research paper titled "Review of Bumpless Build Cube (BBCube) Using Wafer-on-Wafer (WOW) and Chip-on-Wafer (COW) for Tera-Scale Three-Dimensional Integration (3DI)" from researchers at Tokyo Institute of Technology and others. Abstract "Bumpless Build Cube (BBCube) using Wafer-on-Wafer (WOW) and Chip-on-Wafer (COW) for Tera-Scale Three-Dimensional Integration (3DI) is discussed. Bum... » read more

Effect of Different Frequency Scaling Levels on Memory in Regard to Total Power Consumption in Mobile MPSoC

By Technical Paper Link - 06 Jun, 2022 - Comments: 0

New technical paper titled "CPU-GPU-Memory DVFS for Power-Efficient MPSoC in Mobile Cyber Physical Systems" from researchers at University of Essex, Nosh Technologies, and University of Southampton. Abstract "Most modern mobile cyber-physical systems such as smartphones come equipped with multi-processor systems-on-chip (MPSoCs) with variant computing capacity both to cater to performance r... » read more

Electronics And Sustainability: Can Smart Engineering Save The Planet?

By Frank Schirrmeister - 28 Apr, 2022 - Comments: 0

We just celebrated Earth Day 2022 with great fanfare. In discussions with my favorite Gen Z family member, I sense genuine concerns that sustainability goals seem like a tall order. Let’s review the contributions the electronics industry can make to sustainability. First, defining sustainability seems to lead to three main pillars—environmental, social, and economic sustainability. I fou... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: power consumption