What Is Power Usage Effectiveness (PUE) In Data Centers?


In 2024, data centers consumed around 415 terawatt hours (TWh), or about 1.5% of global electricity, says the International Energy Agency. As the backbone of the digital economy, data centers are estimated to consume 2-3% of the world’s electricity by 2030. To manage this consumption, industry leaders have relied on a single metric: Power usage effectiveness (PUE). What is power usage ... » read more

Tracking Your Preferences


I like to use my last blog of the year to focus on you, the reader. You provide valuable feedback to me and the rest of the team at Semiconductor Engineering. What do you want to see us write about? How in-depth should things be? This is always a balance between the amount of information provided and the rate at which readers tire with an article. My focus is the channels I write for – Sys... » read more

Co-Optimizing GPU Architecture And SW To Enhance Edge Inference Performance (NVIDIA)


A new technical paper titled "EdgeReasoning: Characterizing Reasoning LLM Deployment on Edge GPUs" was published by researchers at NVIDIA. Abstract "Edge intelligence paradigm is increasingly demanded by the emerging autonomous systems, such as robotics. Beyond ensuring privacy-preserving operation and resilience in connectivity-limited environments, edge deployment offers significant energ... » read more

Implementing Power Dynamic Response For Greener AI Data Centers (Univ. of Cambridge, Nyobolt, Nanyang Tech)


A new technical paper titled "Improving AI Efficiency in Data Centres by Power Dynamic Response" was published by researchers at University of Cambridge, Nyobolt Limited and Nanyang Technological University. Abstract "The steady growth of artificial intelligence (AI) has accelerated in the recent years, facilitated by the development of sophisticated models such as large language models and... » read more

Critical Optimization Factors For GenAI Chipmakers


Today’s GenAI arms race is fought with novel chip architectures and packaging. Specialized hardware designs are proliferating in the form of GPUs, TPUs, NPUs, and more, all tuned for parallelism and matrix-heavy AI math. In this hyper-competitive landscape, chip vendors scramble to differentiate their products on multiple fronts. They promise some mix of better performance, efficiency, or ... » read more

Speeding Time To Market With A Future-Proof Fabric


This whitepaper covers how Tenstorrent is elevating their AI fabric to new heights of performance, efficiency, and productivity through a collaboration with Baya Systems. Tenstorrent’s in-house fabric has set a new standard for efficiency and performance in AI compute in their current generation products and is proactively addressing the needs of the next generation. By combining Tenstorrent�... » read more

AI: Driving the Way to Safer and Smarter Cars


As autonomous vehicles have only begun to appear on limited public roads, it has become clear that achieving widespread adoption will take longer than early predictions suggested. With Level 3 systems in place, the road ahead leads to full autonomy and Level 5 self-driving. However, it’s going to be a long climb. Much of the technology that got the industry to Level 3 will not scale in all th... » read more

Power Stabilization To Allow Continued Scaling Of AI Training Workloads (Microsoft, OpenAI, NVIDIA)


A new technical paper titled "Power Stabilization for AI Training Datacenters" was published by researchers at Microsoft, OpenAI, and NVIDIA. Abstract "Large Artificial Intelligence (AI) training workloads spanning several tens of thousands of GPUs present unique power management challenges. These arise due to the high variability in power consumption during the training. Given the synchron... » read more

SpiNNaker2 Neuromorphic Platform: HW-Aware Fine-Tuning of Spiking Q-Networks (TU Dresden Et Al.)


A new technical paper titled "Hardware-Aware Fine-Tuning of Spiking Q-Networks on the SpiNNaker2 Neuromorphic Platform" was published by researchers at TU Dresden, ScaDS.AI and Centre for Tactile Internet with Human-in-the-Loop (CeTI). Excerpt "Spiking Neural Networks (SNNs) promise orders-of-magnitude lower power consumption and low-latency inference on neuromorphic hardware for a wide ran... » read more

Often Overlooked, PHYs Are Essential To High-Speed Data Movement


Over the past couple of decades, the semiconductor industry has evolved from a supporting role for traditional verticals like mobile, automotive, and PCs to a foundational role in those markets, as well as in AI factories and hyperscale data centers. Underlying this transformation is the physical layer (PHY), which has emerged as a critical enabler for data transfer and communications. The P... » read more

← Older posts