Improving Performance and Power Efficiency By Safely Eliminating Load Instruction Execution (ETH Zürich, Intel)


A technical paper titled “Constable: Improving Performance and Power Efficiency by Safely Eliminating Load Instruction Execution” was published by researchers at ETH Zürich and Intel Corporation.  This paper earned the Best Paper Award in the International Symposium on Computer Architecture (ISCA). Abstract: "Load instructions often limit instruction-level parallelism (ILP) in modern pr... » read more

KAN: Kolmogorov Arnold Networks: An Alternative To MLPs (MIT, CalTech, et al.)


A new technical paper titled "KAN: Kolmogorov-Arnold Networks" was published by researchers at MIT, CalTech, Northeastern University and The NSF Institute for Artificial Intelligence and Fundamental Interactions. Abstract: "Inspired by the Kolmogorov-Arnold representation theorem, we propose Kolmogorov-Arnold Networks (KANs) as promising alternatives to Multi-Layer Perceptrons (MLPs). While... » read more

Semiconductor Testing Unlocks Increasing Levels Of ADAS


Today’s advanced driver assistance systems (ADAS) require unprecedented computing power – tasked with processing an incredible amount of data from sensors in real-time, making split-second decisions, and ensuring the safety and comfort of passengers. The challenge is fluid and, as vehicles ascend from one level of autonomous driving to the next, computational demands will rise exponentially... » read more

Efficient Electronics


Attention nowadays has turned to the energy consumption of systems that run on electricity. At the moment, the discussion is focused on electricity consumption in data centers: if this continues to rise at its current rate, it will account for a significant proportion of global electricity consumption in the future. Yet there are other, less visible electricity consumers whose power needs are a... » read more

Merging Power and Arithmetic Optimization Via Datapath Rewriting (Intel, Imperial College London)


A new technical paper titled "Combining Power and Arithmetic Optimization via Datapath Rewriting" was published by researchers at Intel Corporation and Imperial College London. Abstract: "Industrial datapath designers consider dynamic power consumption to be a key metric. Arithmetic circuits contribute a major component of total chip power consumption and are therefore a common target for p... » read more

The Journey To Exascale Computing And Beyond


High performance computing witnessed one of its most ambitious leaps forward with the development of the US supercomputer “Frontier.” As Scott Atchley from Oak Ridge National Laboratory discussed at Supercomputing 23 (SC23) in Denver last month, the Frontier had the ambitious goal of achieving performance levels 1000 times higher than the petascale systems that preceded it, while also stayi... » read more

Supercomputing Efficiency Lags Performance Gains


In last month’s article, Top 500: Frontier is Still on Top, I wrote about the latest versions of the Top500 and Green500 lists. Power is an incredibly important aspect of designing a world performance leading supercomputer. (Why, I can remember back to when you could run the world’s fastest machine on only a couple MW of power.) The first Green500 list was published back in 2013. Happy 1... » read more

A Highly Wasteful Industry


The systems industry as a whole is not concerned about power. I know that is a bold statement, but I believe it to be true. The semiconductor industry is mildly concerned, but only indirectly. They care about power because thermal issues are limiting the functionality they can squeeze onto a chip, or in a package. Some users, such as data center operators, claim to care about power because i... » read more

How The Electronics Industry Can Shape A More Sustainable, Energy-Efficient World


By Piyush Sancheti and Godwin Maben We’re already experiencing the effects of our world’s changing climate—devastating wildfires, prolonged droughts, torrential flooding, just to name a few examples. Global energy consumption is increasing, raising carbon dioxide levels and triggering extreme weather conditions. Two key forces driving these trends are the shift to hyperscale datacenter... » read more

Efficient Gated Clock Design Approach for LFSR


A technical paper titled "A Novel Clock Gating Approach for the Design of Low-Power Linear Feedback Shift Registers" was published by researchers at Università degli Studi di Catania, Italy. Abstract "This paper presents an efficient solution to reduce the power consumption of the popular linear feedback shift register by exploiting the gated clock approach. The power reduction with respec... » read more

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