Convolutional Compaction-Based MRAM Fault Diagnosis

Abstract: "Spin-transfer torque magnetoresistive random-access memories (STT-MRAMs) are gradually superseding conventional SRAMs as last-level cache in System-on-Chip designs. Their manufacturing process includes trimming a reference resistance in STT-MRAM modules to reliably determine the logic values of 0 and 1 during read operations. Typically, an on-chip trimming routine consists of mult... » read more

Applying Machine Learning To Chips

The race is on to figure out how to apply analytics, data mining and machine learning across a wide swath of market segments and applications, and nowhere is this more evident than in semiconductor design and manufacturing. The key with ML/DL/AI is understanding how devices react to real events and stimuli, and how future devices can be optimized. That requires sifting through an expandi... » read more