Minimizing Voltage Loss And Improving Yield In Advanced GAA Chips


The problem: As metal pitch scaling shrinks to support the next generation of logic devices, the IR (or voltage) drop from conventional frontside connections has become a major challenge [1,2]. As electricity travels through a chip’s metal wiring, some voltage gets lost because wires have resistance. If the voltage drops too much, the chip’s transistors can’t get enough power and ... » read more

Pathfinding By Process Window Modeling: Advanced DRAM Capacitor Patterning Process Window Evaluation Using Virtual Fabrication


In advanced DRAM, capacitors with closely packed patterning are designed to increase cell density. Thus, advanced patterning schemes, such as multiple litho-etch, SADP and SAQP processes may be needed. In this paper, we systematically evaluate a DRAM capacitor hole formation process that includes SADP and SAQP patterning, using virtual fabrication and statistical analysis in SEMulator3D. The pu... » read more