tag: processing in memory

Open DRAM Model For PIM Analysis In 3D DRAM (Georgia Tech)
By Technical Paper Link - 12 Jul, 2026 - Comments: 0

Researchers from Georgia Institute of Technology published a technical paper titled “Open DRAM Model—Part II: Enabling Processing-in-Memory in 3-D DRAM.” Abstract Excerpt: “In this work, we present an “Open DRAM Model” that enables comprehensive circuit-level analysis of DRAM operations across multiple architectures, including conventional 6F2 BCAT, scaled 4F2 VCT, and monolit... » read more

Interference Risks In Processing-Using-DRAM (U. of Tokyo, ETH Zurich, CISPA, Riken)
By Technical Paper Link - 22 Jun, 2026 - Comments: 0

Researchers from The University of Tokyo, ETH Zurich, CISPA, and RIKEN published a technical paper titled “PuDGhost: Experimental Analysis of Computation Result Corruption in Processing-using-DRAM Operations on Real DRAM Chips and Implications for Future Systems.” Abstract excerpt: “We reveal PuDGhost, an interference phenomenon where a PuD operation in a given column produces erron... » read more

Data-Centric ML Compiler For PIM (U. of Toronto, Barcelona Supercomputing Center, ETH Zurich, Max Planck)
By Technical Paper Link - 19 Dec, 2025 - Comments: 0

A new technical paper titled "A Tensor Compiler for Processing-In-Memory Architectures" was published by researchers at University of Toronto, Barcelona Supercomputing Center, ETH Zurich, and the Max Planck Institute for Software Systems. Abstract "Processing-In-Memory (PIM) devices integrated with high-performance Host processors (e.g., GPUs) can accelerate memory-intensive kernels in Ma... » read more

Digital Memristor-Based PIM From A Device And Reliability View (Northwestern, Technion)
By Technical Paper Link - 25 Nov, 2025 - Comments: 0

A new technical paper titled "A Comparative Study of Digital Memristor-Based Processing-In-Memory from a Device and Reliability Perspective" was published by researchers at Northwestern University and  Technion – Israel Institute of Technology. Abstract "As data-intensive applications increasingly strain conventional computing systems, processing-in-memory (PIM) has emerged as a promis... » read more

AI Memory: Enabling The Next Era Of High-Performance Computing
By Tadashi Oda - 11 Nov, 2025 - Comments: 0

The rapid advancement of artificial intelligence (AI) is driving unprecedented demand for high-performance memory solutions. AI-driven applications are fueling significant year-over-year growth in high-bandwidth memory (HBM). However, as AI models grow in complexity—from large language models (LLMs) to real-time inference applications—the need for faster, higher-bandwidth, and energy-effici... » read more

Tools, Models and System Support for PIM Architectures, With DRAM-Focus (ETH Zurich)
By Technical Paper Link - 04 Sep, 2025 - Comments: 0

A new technical paper titled "New Tools, Programming Models, and System Support for Processing-in-Memory Architectures" was published by researchers at ETH Zurich. Abstract "Our goal in this dissertation is to provide tools, programming models, and system support for PIM architectures (with a focus on DRAM-based solutions), to ease the adoption of PIM in current and future systems. To this ... » read more

Thermally-Aware, Multi-Objective Scheduling Framework for DL Workloads on Heterogeneous Multi-Chiplet PIM Architectures (UW–Madison, Washington State)
By Technical Paper Link - 19 Aug, 2025 - Comments: 0

A new technical paper titled "THERMOS: Thermally-Aware Multi-Objective Scheduling of AI Workloads on Heterogeneous Multi-Chiplet PIM Architectures" was published by researchers at the University of Wisconsin–Madison and Washington State University. Abstract "Chiplet-based integration enables large-scale systems that combine diverse technologies, enabling higher yield, lower costs, and sca... » read more

Research Bits: July 29
By Jesse Allen - 29 Jul, 2025 - Comments: 0

Sort-in-memory Researchers from Peking University and the Chinese Institute for Brain Research developed a sort-in-memory hardware system based on memristors that is tailored for complex, nonlinear sorting tasks. The comparator-free processing-in-memory architecture is built on a one-transistor–one-resistor (1T1R) memristor array, using a Digit Read mechanism that replaces traditional com... » read more

Energy-Efficient DRAM↔PIM Transfers for PIM Systems (KAIST)
By Technical Paper Link - 18 Sep, 2024 - Comments: 0

A new technical paper titled "PIM-MMU: A Memory Management Unit for Accelerating Data Transfers in Commercial PIM Systems" was published by researchers at KAIST. Abstract "Processing-in-memory (PIM) has emerged as a promising solution for accelerating memory-intensive workloads as they provide high memory bandwidth to the processing units. This approach has drawn attention not only from the... » read more

Survey of Energy Efficient PIM Processors
By Technical Paper Link - 01 Aug, 2024 - Comments: 0

A new technical paper titled "Survey of Deep Learning Accelerators for Edge and Emerging Computing" was published by researchers at University of Dayton and the Air Force Research Laboratory. Abstract "The unprecedented progress in artificial intelligence (AI), particularly in deep learning algorithms with ubiquitous internet connected smart devices, has created a high demand for AI compu... » read more

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