Chip Industry Week In Review


Synopsys agreed to sell its Optical Solutions Group to Keysight for an undisclosed amount, in a deal deemed necessary for Synopsys to win regulatory approval for its planned acquisition of Ansys. The sale to Keysight is contingent on the Synopsys-Ansys deal going through. Meanwhile, Ansys has its own optical business. The U.S. Department of Defense (DoD) made the first awards for Microelectr... » read more

Chip Industry Week in Review


The Biden-Harris Administration announced preliminary terms with HP for $50 million in direct funding under the CHIPs and Science Act to support the expansion and modernization of HP’s existing microfluidics and microelectromechanical systems (“MEMS”) facility in Corvallis, Oregon. CHIPS for America launched the CHIPS Metrology Community, a collaborative initiative designed to advance ... » read more

Chip Industry Week In Review


The U.S. Department of Commerce and Texas Instruments (TI) signed a non-binding preliminary memorandum of terms to provide up to $1.6 billion in CHIPS Act funding towards TI’s investment of over $18 billion for three 300mm semiconductor wafer fabs under construction in Texas and Utah. TI also expects to get about $6 billion to $8 billion from the U.S. Department of Treasury’s Investmen... » read more

Reasons To Know IGZO


Interest in monolithic 3D integration is driven by both compute-in-memory applications and a more general need for increased circuit density. Compute-in-memory architectures seek to reduce the power requirements of machine learning workloads, which are dominated by the movement of data between memory and logic components. Even in conventional architectures, though, placing high-density, high-ba... » read more

Chip Industry Week In Review


Three Fraunhofer Institutes (IIS/EAS, IZM, and ENAS) launched the Chiplet Center of Excellence, a research initiative to support the commercial introduction of chiplet technology. The center initially will focus on automotive electronics, developing workflows and methods for electronics design, demonstrator construction, and the evaluation of reliability. The UCIe Consortium published the Un... » read more

Chip Industry Week in Review


Okinawa Institute of Science and Technology proposed a new EUV litho technology using only four reflective mirrors and a new method of illumination optics that it claims will use 1/10 the power and cost half as much as existing EUV technology from ASML. Applied Materials may not receive expected U.S. funding to build a $4 billion research facility in Sunnyvale, CA, due to internal government... » read more

Research Bits: July 22


Sub-1nm gate Researchers from Korea's Institute for Basic Science, Sungkyunkwan University, Harvard University, and Korea Advanced Institute of Science and Technology (KAIST) found a method that enables epitaxial growth of 1D metallic materials with a width of less than 1 nm, which they used as a gate electrode of a miniaturized transistor. The team controlled the crystal structure of molyb... » read more

Chip Industry Technical Paper Roundup: July 22


New technical papers recently added to Semiconductor Engineering’s library. [table id=245 /] More ReadingTechnical Paper Library home » read more

Functional Compaction for Functional Test Sequences (Purdue University, I. Pomeranz)


A new technical paper titled "Functional Compaction for Functional Test Sequences" was published by IEEE Fellow Irith Pomeranz at Purdue University. Abstract: "The occurrence of silent data corruption because of hardware defects in large scale data centers points to the advantages of applying functional test sequences to detect hardware defects that escape scan-based tests. When using funct... » read more

Chip Industry Technical Paper Roundup: July 16


New technical papers recently added to Semiconductor Engineering’s library. [table id=244 /] More ReadingTechnical Paper Library home   » read more

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