tag: RISC-V

A Minimal RISC-V
By Brian Bailey - 13 Jan, 2022 - Comments: 8

Microcontrollers exist in almost everything, but can RISC-V satisfy the needs of this market? Is it small enough to replace 8-bit processors? What might help people migrate to a more modern processor architecture? RISC-V defines a 32-bit processor instruction set architecture (ISA) that is open source and free to be implemented in any number of ways. It is touted for being a very small and e... » read more

Is Programmable Overhead Worth The Cost?
By Brian Bailey - 13 Jan, 2022 - Comments: 0

Programmability has fueled the growth of most semiconductor products, but how much does it actually cost? And is that cost worth it? The answer is more complicated than a simple efficiency formula. It can vary by application, by maturity of technology in a particular market, and in the context of much larger systems. What's considered important for one design may be very different for anothe... » read more

Industry Transforming In Ways Previously Unimaginable
By Brian Bailey - 30 Dec, 2021 - Comments: 0

Early in the year, everyone expected that the availability of COVID vaccines would signal the start of a return to normal, but that has certainly not been the case. Now the industry is taking a longer-term view about how to transform business, what is necessary for people to maintain their mental health, and how to create robust hybrid work environments for the future that do not discard the po... » read more

The High But Often Unnecessary Cost Of Coherence
By Brian Bailey - 22 Dec, 2021 - Comments: 3

Cache coherency, a common technique for improving performance in chips, is becoming less useful as general-purpose processors are supplemented with, and sometimes supplanted by, highly specialized accelerators and other processing elements. While cache coherency won't disappear anytime soon, it is increasingly being viewed as a luxury necessary to preserve a long-standing programming paradig... » read more

The Past Predicting The Future
By Brian Bailey - 22 Dec, 2021 - Comments: 0

It is often said that you cannot predict the future by looking at the past, but that isn't always correct. There are many clues provided by digging into change. Those changes are a prelude to what may happen in the future. One way we can do that here at Semiconductor Engineering is by looking at changes in reading habits. What types of articles are attracting the most attention? This is a sure ... » read more

Growth And Enthusiasm At The RISC-V Summit 2021
By Rupert Baines - 22 Dec, 2021 - Comments: 0

We weren’t sure what to expect from our first major attendance at a #RISCVSummit. Although we were a founding member of RISC-V – as we’ve been saying quite a lot recently – we have been hiding our light under a bushel. We’ve certainly been busy though – enabling over 2 billion RISC-V cores with our RISC-V processor IP and Studio tools while helping customers use architecture lice... » read more

Improving Energy And Power Efficiency In The Data Center
By Ann Mutschler - 06 Dec, 2021 - Comments: 0

Energy costs in data centers are soaring as the amount of data being generated explodes, and it's being made worse by an imbalance between increasingly dense processing elements that are producing more heat and uneven server utilization, which requires more machines to be powered up and cooled. The challenge is to maximize utilization without sacrificing performance, and in the past that has... » read more

Gaps In The AI Debug Process
By Brian Bailey - 23 Nov, 2021 - Comments: 0

When an AI algorithm is deployed in the field and gives an unexpected result, it's often not clear whether that result is correct. So what happened? Was it wrong? And if so, what caused the error? These are often not simple questions to answer. Moreover, as with all verification problems, the only way to get to the root cause is to break the problem down into manageable pieces. The semico... » read more

Debugging Embedded Applications
By Ann Mutschler - 10 Nov, 2021 - Comments: 0

Debugging embedded designs is becoming increasingly difficult as the number of observed and possible interactions between hardware and software continue to grow, and as more features are crammed into chips, packages, and systems. But there also appear to be some advances on this front, involving a mix of techniques, including hardware trace, scan chain-based debug, along with better simulation ... » read more

HECTOR-V: A Heterogeneous CPU Architecture for a Secure RISC-V Execution Environment
By Technical Paper Link - 09 Nov, 2021 - Comments: 0

Summary "To ensure secure and trustworthy execution of applications, vendors frequently embed trusted execution environments into their systems. Here, applications are protected from adversaries, including a malicious operating system. TEEs are usually built by integrating protection mechanisms directly into the processor or by using dedicated external secure elements. However, both of these... » read more

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