tag: RISC-V

RISC-V Ultra-Low-Power Edge Accelerators (EPFL)
By Technical Paper Link - 30 Jan, 2024 - Comments: 0

A technical paper titled “X-HEEP: An Open-Source, Configurable and Extendible RISC-V Microcontroller for the Exploration of Ultra-Low-Power Edge Accelerators” was published by researchers at EPFL. Abstract: "The field of edge computing has witnessed remarkable growth owing to the increasing demand for real-time processing of data in applications. However, challenges persist due to limitat... » read more

EDA Back On Investors’ Radar
By Brian Bailey - 25 Jan, 2024 - Comments: 0

EDA is transforming from a staid but strategic sector into a hot investment market, fueled by strong earnings and growth, a clamoring for leading-edge and increasingly customized designs across new and existing markets, and the rollout of advanced technologies such as AI for a range of tools that will be needed to develop new architectures with much greater performance per watt. A confluence... » read more

RISC-V Micro-Architectural Verification
By Brian Bailey - 21 Dec, 2023 - Comments: 3

RISC-V processors are garnering a lot of attention due to their flexibility and extensibility, but without an efficient and effective verification strategy, buggy implementations may lead to industry problems. Prior to RISC-V, processor verification almost became a lost art for most semiconductor companies. Expertise was condensed into the few commercial companies that provided processors or... » read more

What You Needed To Know In 2023
By Brian Bailey - 21 Dec, 2023 - Comments: 0

I always use the last blog of the year to review everything published in the Systems & Design and Low Power – High Performance channels of Semiconductor Engineering, the two channels that I write for. It is useful to see what interests you and, as I have found in the past, it is an indicator of where the industry is going. You read about the issues you are facing as designers, and you nee... » read more

Dramatic Changes Ahead For Chips And Systems
By Karen Heyman - 21 Dec, 2023 - Comments: 0

Early this year, most people had never heard of generative AI. Now the entire world is racing to capitalize on it, and that's just the beginning. New markets, such as spatial computing, quantum computing, 6G, smart infrastructure, sustainability, and many more are accelerating the need to process more data faster, more efficiently, and with much more domain specificity. Compared to the days ... » read more

Dual Instruction-Set Architecture, Supporting A TTA And RISC-V Instruction Set Via a Lightweight Microcode Hardware Unit
By Technical Paper Link - 13 Dec, 2023 - Comments: 0

A technical paper titled “Energy-Efficient Exposed Datapath Architecture With a RISC-V Instruction Set Mode” was published by researchers at Tampere University. Abstract: "Transport triggered architectures (TTAs) follow the static programming model of very long instruction word (VLIW) processors but expose additional information of the processor datapath in the programming interface, whic... » read more

System State Challenges Widen
By Brian Bailey - 30 Nov, 2023 - Comments: 0

Knowing the state of a system is essential for many analysis and debug tasks, but it's becoming more difficult in heterogeneous systems that are crammed with an increasing array of features. There is a limit as to how many things engineers can keep track of, and the complexity of today's systems extends far beyond that. Hierarchy and abstraction are used to help focus on the important aspect... » read more

The Evolution Of RISC-V Processor Verification: Open Standards And Verification IP
By Imperas - 29 Nov, 2023 - Comments: 0

The OpenHW Group’s [1] Verification task group has been a pioneer in the development of methodologies and verification collateral for RISC-V processor verification. Since 2019 the members have worked together to develop CORE-V-VERIF: a UVM environment for the verification of RISC-V processor cores. Over this period of time the CORE-V-VERIF environment has evolved as new processor verification... » read more

Fast Interrupt Extension For MCU RISC-V
By Technical Paper Link - 20 Nov, 2023 - Comments: 0

A technical paper titled “CV32RT: Enabling Fast Interrupt and Context Switching for RISC-V Microcontrollers” was published by researchers at ETH Zurich and University of Bologna. Abstract: "Processors using the open RISC-V ISA are finding increasing adoption in the embedded world. Many embedded use cases have real-time constraints and require flexible, predictable, and fast reactive handl... » read more

Coding And Debugging RISC-V
By Ann Mutschler - 06 Nov, 2023 - Comments: 0

As monolithic device scaling continues to wind down and evolve toward increasingly heterogeneous designs, it has created an inflection point for chip architects to create customized cores that are much more energy efficient and faster than off-the-shelf processors. Zdeněk Přikryl, CTO of Codasip, talks about where RISC-V fits into this picture, using a modular ISA and custom instruction layer... » read more

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