Making SoC Integration Simple – Achieve Higher Productivity and Quality


The development of large-scale semiconductors has never been a simple task, but with the development of ever more powerful computers, software environments, and verification models, the task of designing cutting-edge chips becomes far more manageable. However, now that many chips being developed are utilizing as many as 1000 IP cores, the challenges of correctly connecting these modules togethe... » read more

Physical-Aware RTL Restructuring For SoC Cost Reduction


In modern SoC design, RTL hierarchy has to be manipulated throughout the entire design flow in order to accommodate different objectives at different stages of the design process. This becomes particularly true as more and more building blocks of the SoC are reused from previous designs. These requirements are driven by the need to: Adapt the RTL design hierarchy to create homogeneous subs... » read more