Chip Industry Week In Review


President Biden will raise the tariff rate on Chinese semiconductors from 25% to 50% by 2025, among other measures to protect U.S. businesses from China’s trade practices. Also, as part of President Biden’s AI Executive Order, the Administration released steps to protect workers from AI risks, including human oversight of systems and transparency about what systems are being used. Intel ... » read more

Research Bits: May 10


Growing 2D TMDs on chips Researchers from Massachusetts Institute of Technology (MIT), Oak Ridge National Laboratory, and Ericsson Research found a way to “grow” layers of 2D transition metal dichalcogenide (TMD) materials directly on top of a fully fabricated silicon chip, a technique they say could enable denser integrations. The researchers focused on molybdenum disulfide, which is f... » read more

Chip Industry’s Technical Paper Roundup: Jan. 17


New technical papers added to Semiconductor Engineering’s library. [table id=74 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us posting li... » read more

Hardware Trojan Detection Case Study Based on 4 Different ICs Manufactured in Progressively Smaller CMOS Process Technologies


A technical paper titled "Red Team vs. Blue Team: A Real-World Hardware Trojan Detection Case Study Across Four Modern CMOS Technology Generations" was published by researchers at Max Planck Institute for Security and Privacy, Université catholique de Louvain (Belgium), Ruhr University Bochum, and Bundeskriminalamt. "In this work, we aim to improve upon this state of the art by presenting a... » read more

Chip Industry’s Technical Paper Roundup: Nov. 1


New technical papers added to Semiconductor Engineering’s library this week. [table id=61 /] » read more

Side-Channel Secure Translation Lookaside Buffer Architecture


A new technical paper titled "Risky Translations: Securing TLBs against Timing Side Channels" was posted by researchers at Ruhr University Bochum (Germany) and Cyber-Physical Systems of the German Research Center for Artificial Intelligence (DFKI). Abstract: "Microarchitectural side-channel vulnerabilities in modern processors are known to be a powerful attack vector that can be utilized to... » read more