NAND Market Hits Speed Bump


Demand for NAND flash memory remains robust due to the onslaught of data in systems, but the overall NAND flash market is stuck in the middle of a challenging period beset by product shortages, supply chain issues and a difficult technology transition. Intel, Micron, Samsung, SK Hynix and the Toshiba/Western Digital duo continue to ship traditional planar NAND in the market, but this technol... » read more

Shrink Or Package?


Advanced packaging is rapidly becoming a mainstream option for chipmakers as the cost of integrating heterogeneous components on a single die continues to rise. Despite several years of buzz around this shift, the reality is that it has taken more than a half-century to materialize. Advanced [getkc id="27" kc_name="packaging"] began with IBM flip chips in the 1960s, and it got another boost ... » read more

Foundry Roadmaps: Real Solutions, Or Just Hedging?


Major semiconductor foundries have revealed their advanced technology roadmaps for the next few years. They’re all investing billions of dollars into the development of process technologies and packaging options. The number of alternatives has been described as ‘dizzying’. How can all the foundries remain profitable? How does the customer decide which ‘route’ to take? For the 2... » read more

The Week In Review: Manufacturing


Chipmakers UMC has appointed two senior vice presidents--S.C. Chien and Jason Wang--as co-presidents of the company, following Po-Wen Yen’s retirement as UMC’s CEO. The co-presidents are accountable for the overall performance of UMC. They will report to UMC Chairman Stan Hung. Chien will focus on the core manufacturing and technology aspects of UMC, including R&D and operations. Wang wil... » read more

New BEOL/MOL Breakthroughs?


Chipmakers are moving ahead with transistor scaling at advanced nodes, but it's becoming more difficult. The industry is struggling to maintain the same timeline for contacts and interconnects, which represent a larger portion of the cost and unwanted resistance in chips at the most advanced nodes. A leading-edge chip consists of three parts—the transistor, contacts and interconnects. The ... » read more

Inside FD-SOI And Scaling


Gary Patton, chief technology officer at [getentity id="22819" comment="GlobalFoundries"], sat down with Semiconductor Engineering to discuss FD-SOI, IC scaling, process technology and other topics. What follows are excerpts of that conversation. SE: In logic, GlobalFoundries is shipping 14nm finFETs with 7nm in the works. The company is also readying 22nm FD-SOI technology with 12nm FD-SOI ... » read more

Modeling On-Chip Variation At 10/7nm


Simulation, a workhorse tool for semiconductor design, is running out of steam at 10/7nm. It is falling behind on chips with huge gate counts and an enormous number of possible interactions between all the different functions that are being crammed onto a die. At simulation's root is some form of SPICE, which has served as its underpinnings ever since SPICE was first published 44 years ago. ... » read more

2.5D, ASICs Extend to 7nm


The leading-edge foundry market is heating up. For example, GlobalFoundries, Intel, Samsung and TSMC have recently announced their new and respective processes. The new processes from vendors range anywhere from 10nm to 4nm, although the current battle is taking place at 10nm and/or 7nm. In fact, one vendor, GlobalFoundries, this week will describe more details about its previously-announced... » read more

The Week In Review: Manufacturing


Market research Earlier this year, the IC and equipment markets were projected to be flat. More recently, though, analysts have raised their forecast, including Pacific Crest Securities. “We are raising our 2017 capex outlook meaningfully, with the upside coming predominantly from Samsung,” said Weston Twigg, an analyst with Pacific Crest Securities, in a report. "We're raising our 2017 se... » read more

Age Of Acceleration


A shift from the fastest processors to accelerating specific functions is underway, supplanting an era of dark silicon in which one or more processor cores remain in a ready state whenever a single core's performance bogs down. In effect, the dark silicon/multi-core approach is being scrapped for many functions in favor of an accelerator-based microarchitecture that is far more granular. The... » read more

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