tag: security

Low-Power Design Becomes Even More Complex
By Ann Mutschler - 16 Jul, 2019 - Comments: 0

Throughout the SoC design flow, there has been a tremendous amount of research done to ease the pain of managing a long list of power-related issues. And while headway has been made, the addition of new application areas such as AI/ML/DL, automotive and IoT has raised as many new problems as have been solved. The challenges are particularly acute at leading-edge nodes where devices are power... » read more

Tackling Safety And Security
By Brian Bailey - 10 Jul, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss industry attitudes towards safety and security with Dave Kelf, chief marketing officer for Breker Verification; Jacob Wiltgen, solutions architect for functional safety at Mentor, a Siemens Business; David Landoll, solutions architect for OneSpin Solutions; Dennis Ciplickas, vice president of characterization solutions at PDF Solutions; Andrew Dauma... » read more

Big Shifts In Big Data
By Ed Sperling - 09 Jul, 2019 - Comments: 0

The big data market is in a state of upheaval as companies begin shifting their data strategies from "nothing" or "everything" in the cloud to a strategic mix, squeezing out middle-market players and changing what gets shared, how that data is used, and how best to secure it. This has broad implications for the whole semiconductor supply chain, because in many cases it paves the way for ... » read more

Security’s Very Strange Path To Success
By Ed Sperling - 02 Jul, 2019 - Comments: 0

Security at the chip level appears to be heading toward a more promising future. The reason is simple—more people are willing to pay for security than in the past. For the most part, security is like insurance. You don't know it's working until something goes wrong, and you don't necessarily even know right away if there has been a breach. Sometimes it takes years to show up, because it ca... » read more

Understanding The Importance Of Silicon Security
By Ben Levine - 02 Jul, 2019 - Comments: 0

Vulnerabilities like Meltdown, Spectre and Foreshadow are understandably considered quite serious by the semiconductor industry. This is because they can be exploited by a determined attacker to access sensitive data that should be securely locked down but isn’t. We can think about a cloud-based server running multiple applications that process and store sensitive data. Vulnerabilities lik... » read more

How To Navigate The Open Source Risk Landscape
By Synopsys - 01 Jul, 2019 - Comments: 0

Open source use isn’t risky, but unmanaged use of open source is. Open source software forms the backbone of nearly every application in every industry. Chances are that includes the applications your company develops as well. If you can’t produce an accurate inventory of the licenses, versions, and patch status of the open source components in your applications, it’s time to assess yo... » read more

Complete Formal Verification of RISC V Processor IPs for Trojan-Free Trusted ICs
By OneSpin Solutions - 26 Jun, 2019 - Comments: 0

RISC-V processor IPs are increasingly being integrated into system-on-chip designs for a variety of applications. However, there is still a lack of dedicated functional verification solutions supporting high-integrity, trusted integrated circuits. This paper examines an efficient, novel, formal-based RISC-V processor verification methodology. The RISC-V ISA is formalized in a set of Operational... » read more

Who’s Responsible For Security Breaches?
By Brian Bailey - 24 Jun, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss industry attitudes towards safety and security with Dave Kelf, chief marketing officer for Breker Verification; Jacob Wiltgen, solutions architect for functional safety at Mentor, a Siemens Business; David Landoll, solutions architect for OneSpin Solutions; Dennis Ciplickas, vice president of characterization solutions at PDF Solutions; Andrew Dauma... » read more

Copy-Row DRAM (CROW) : Substrate for Improving DRAM
By Technical Paper Link - 22 Jun, 2019 - Comments: 0

Source/Credit: ETH Zurich & Carnegie Mellon University Click here for the technical paper and here for the power point slides » read more

Power, Reliability And Security In Packaging
By Ed Sperling - 19 Jun, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss advanced packaging with Ajay Lalwani, vice president of global manufacturing operations at eSilicon; Vic Kulkarni, vice president and chief strategist in the office of the CTO at ANSYS; Calvin Cheung, vice president of engineering at ASE; Walter Ng, vice president of business management at UMC; and Tien Shiah, senior manager for memory at Samsun... » read more

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