tag: semiconductor test

Reversible Chain Diagnosis
By Siemens EDA - 11 Mar, 2025 - Comments: 0

For advanced technologies, the industry is seeing very complicated silicon defect types and defect distribution. One consequence is that scan chain diagnosis becomes more difficult. To improve the resolution of scan chain diagnosis, Tessent Diagnosis can use new scan chain test patterns to leverage a reversible scan chain architecture. This paper describes the novel scan chain architecture t... » read more

Wafer-Level Test Infrastructure for Higher Parallel Wafer Level Testing of SoC
By Technical Paper Link - 03 Mar, 2025 - Comments: 0

A new technical paper titled "Design and Implementation of Test Infrastructure for Higher Parallel Wafer Level Testing of System-on-Chip" was published by researchers at Inha University and Teradyne. Abstract "Semiconductor companies have been striving to reduce their manufacturing costs. High parallelism is a key factor in reducing costs during wafer-level testing. Wafer testing is conduct... » read more

Simulation Closes Gap Between Chip Design Optimization And Manufacturability
By Gregory Haley - 11 Feb, 2025 - Comments: 0

Simulation is playing an increasingly critical and central role throughout the design-through-manufacturing flow, fusing together everything from design to manufacturing and test in order to reduce the number and cost of silicon respins. The sheer density of modern chips, combined with advanced packaging techniques like 3D stacking and heterogeneous integration, has made iterative physical p... » read more

Characterizing Defects Inside Hexagonal Boron Nitride (KAIST, NYU, et al.)
By Technical Paper Link - 23 Oct, 2024 - Comments: 0

A new technical paper titled "Characterizing Defects Inside Hexagonal Boron Nitride Using Random Telegraph Signals in van der Waals 2D Transistors" was published by researchers at KAIST, NYU, Brookhaven National Laboratory, and National Institute for Materials Science. Abstract: "Single-crystal hexagonal boron nitride (hBN) is used extensively in many two-dimensional electronic and quantu... » read more

Real-Time Safety Monitoring
By Ed Sperling - 28 Aug, 2024 - Comments: 0

Various types of semiconductor test will determine whether a chip is free of defects and meets the specification, but understanding how it's behaving in the field under real workloads and harsh ambient conditions may be very different in automotive applications, where vibration, heat, cold can disrupt the normal functioning of a chip over time and reduce its lifespan. Alex Burlak, vice presiden... » read more

Functional Compaction for Functional Test Sequences (Purdue University, I. Pomeranz)
By Technical Paper Link - 17 Jul, 2024 - Comments: 0

A new technical paper titled "Functional Compaction for Functional Test Sequences" was published by IEEE Fellow Irith Pomeranz at Purdue University. Abstract: "The occurrence of silent data corruption because of hardware defects in large scale data centers points to the advantages of applying functional test sequences to detect hardware defects that escape scan-based tests. When using funct... » read more

Cost And Quality Of Chiplets
By Ed Sperling - 19 Mar, 2024 - Comments: 0

Chiplets add a whole new challenge for the semiconductor industry. How much testing is enough? How do you optimize system binning? What’s the right amount of burn-in? The answers to these questions will vary, depending upon cost and quality tradeoffs, the number and source of the chiplets, and real-world workloads and projected lifespans. Marc Jacobs, senior director of solutions architectur... » read more

AI/ML Challenges In Test and Metrology
By Gregory Haley - 12 Mar, 2024 - Comments: 0

The integration of artificial intelligence and machine learning (AI/ML) into semiconductor test and metrology is redefining the landscape for chip fabrication, which will be essential at advanced nodes and in increasingly dense advanced packages. Fabs today are inundated by vast amounts of data collected across multiple manufacturing processes, and AI/ML solutions are viewed as essential for... » read more

Adaptive Test Ramps For Data Intelligence Era
By Laura Peters - 08 Feb, 2024 - Comments: 0

Widely available and nearly unlimited compute resources, coupled with the availability of sophisticated algorithms, are opening the door to adaptive testing. But the speed at which this testing approach is adopted will continue to vary due to persistent concerns about data sharing and the potential for IP theft and data leakage. Adaptive testing is all about making timely changes to a test p... » read more

Unlocking Value: The Power of AI in Semiconductor Test
By Advantest - 09 Jan, 2024 - Comments: 0

AI (Artificial Intelligence) and data analytics empower semiconductor manufacturers to extract valuable insights from the massive amounts of data generated throughout the silicon lifecycle. By leveraging AI algorithms, semiconductor manufacturers can optimize silicon design, assembly, and testing processes. Through the analysis of vast datasets, AI can identify patterns, predict failures, and o... » read more

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