As EDA Processes Becomes More Secure, So Do Chips


Security is becoming a much bigger concern within chips and electronic systems, but the actual implementation remains something of an afterthought, which limits its effectiveness. There are many pieces to the security puzzle on the chip design side that go well beyond just securing the hardware or the IP. The EDA tools themselves need to be secure, as well, and so does the user data within t... » read more

Prefetch Side Channels Undermine the Isolation Between User and Kernel Space on AMD CPUs


This new technical paper titled "AMD Prefetch Attacks through Power and Time" is from researchers at Graz University of Technology and CISPA Helmholtz Center for Information Security. Note, this is a prepublication paper for the USENIX Security Symposium in Boston in August 2022.   This paper includes countermeasures and mitigation strategies, and the paper indicates that the findings were di... » read more

A Low-Power BLS12-381 Pairing Cryptoprocessor for Internet-of-Things Security Applications


Abstract: "We present the first BLS12-381 elliptic-curve pairing cryptoprocessor for Internet-of-Things (IoT) security applications. Efficient finite-field arithmetic and algorithm-architecture co-optimizations together enable two orders of magnitude energy savings. We implement several countermeasures against timing and power side-channel attacks. Our cryptoprocessor is programmable to provid... » read more

DNS Cache Poisoning Attack: Resurrections with Side Channels


Abstract "DNS is one of the fundamental and ancient protocols on the Internet that supports many network applications and services. Unfortunately, DNS was designed without security in mind and is subject to a variety of serious attacks, one of which is the well-known DNS cache poisoning attack. Over the decades of evolution, it has proven extraordinarily challenging to retrofit strong security... » read more

Bandwidth Utilization Side-Channel On ML Inference Accelerators


Abstract—Accelerators used for machine learning (ML) inference provide great performance benefits over CPUs. Securing confidential model in inference against off-chip side-channel attacks is critical in harnessing the performance advantage in practice. Data and memory address encryption has been recently proposed to defend against off-chip attacks. In this paper, we demonstrate that bandwidth... » read more

TimeCache: Using Time to Eliminate Cache Side Channels when Sharing Software


"Abstract—Timing side channels have been used to extract cryptographic keys and sensitive documents even from trusted enclaves. Specifically, cache side channels created by reuse of shared code or data in the memory hierarchy have been exploited by several known attacks, e.g., evict+reload for recovering an RSA key and Spectre variants for leaking speculatively loaded data. In this paper, we ... » read more