How To Get Accurate Inductance Extraction For Superconductor ICs

By Hossam Sarhan - 11 Apr, 2024 - Comments: 0

By Hossam Sarhan and Dusan Petranovic Supporting the high performance and reliability needed for artificial intelligence (AI), data centers and cloud computing requires powerful and efficient integrated circuits (ICs). More semiconductor companies are considering superconductor ICs for their unique properties that allow ultrafast processing of digital information. These properties include fa... » read more

Hybrid Methodology To Extract Kinetic And Magnetic Inductances For Superconductor Technologies

By Siemens EDA - 10 Apr, 2024 - Comments: 0

Integrated circuits (ICs) using superconductors have emerged as the technology of choice for artificial intelligence (AI), data centers, and cloud computing. However, innovative technology requires equally innovative physical verification solutions to ensure that these superconductor ICs deliver the performance and reliability they promise. We introduce an innovative hybrid methodology to extra... » read more

Blog Review: April 10

By Jesse Allen - 10 Apr, 2024 - Comments: 0

Cadence's Shyam Sharma looks at the evolution of the LPDDR standard and finds that LPDDR5X is opening new specialized markets for low-power DRAMs beyond the traditional areas of mobile, IoT, and automotive. Siemens' Hossam Sarhan and Dusan Petranovic find that new physical verification approaches are needed to ensure the performance and reliability of superconducting ICs and introduce a hybr... » read more

Early Cycle Analysis And Verification Of Logical SEU Mitigation

By Jacob Wiltgen - 04 Apr, 2024 - Comments: 0

The global appetite for data continues to soar, driving innovation across all industry sectors, including how space-based technology can facilitate a more connected world. Miniaturized satellites configured into constellations offer faster communication and higher bandwidth than lone satellites flying higher in geocentric or high-earth orbits. However, industry analysis suggests that to make... » read more

Data Center Security Issues Widen

By Adam Kovac - 04 Apr, 2024 - Comments: 0

The total amount of data will swell to about 200 zettabytes of data next year, much of it stored in massive data centers scattered across the globe that are increasingly vulnerable to attacks of all sorts. The stakes for securing data have been rising steadily as the value of that data increases, making it far more attractive to hackers. This is evident in the scope of the attack targets —... » read more

NoCs In 3D Space

By Brian Bailey - 03 Apr, 2024 - Comments: 0

A network on chip (NoC) has become an essential piece of technology that enables the complexity of chips to keep growing, but when designs go 3D, or when third-party chiplets become pervasive, it's not clear how NoCs will evolve or what the impact will be on chiplet architectures. A NoC enables data to move between heterogeneous computing elements, while at the same time minimizing the resou... » read more

Paradigms Of Large Language Model Applications In Functional Verification

By Siemens EDA - 03 Apr, 2024 - Comments: 0

This paper presents a comprehensive literature review for applying large language models (LLM) in multiple aspects of functional verification. Despite the promising advancements offered by this new technology, it is essential to be aware of the inherent limitations of LLMs, especially hallucination that may lead to incorrect predictions. To ensure the quality of LLM outputs, four safeguarding p... » read more

Blog Review: Apr. 3

By Jesse Allen - 03 Apr, 2024 - Comments: 0

Siemens' Keith Felton finds that high bandwidth memory integration poses significant challenges for package designers stemming from its unique architecture and stringent performance requirements. Synopsys' Gervais Fong finds out what's new in the USB4 v2 specification, some of its unique challenges involved in doubling the performance capabilities of the USB wired connection, and an intrigui... » read more

What’s Missing In 2.5D EDA Tools

By Brian Bailey - 28 Mar, 2024 - Comments: 0

Gaps in EDA tool chains for 2.5D designs are limiting the adoption of this advanced packaging approach, which so far has been largely confined to high-performance computing. But as the rest of the chip industry begins migrating toward advanced packaging and chiplets, the EDA industry is starting to change direction. There are learning periods with all new technologies, and 2.5D advanced pack... » read more

A New Strategy For Successful Block/Chip Design-Stage Verification

By David Abercrombie - 28 Mar, 2024 - Comments: 0

Achieving efficiency in integrated circuit (IC) design while maintaining design quality is not just a goal, but a necessity. Designers constantly strive to strike a balance between ever-tightening time-to-market constraints and the finite resources at their disposal, while ensuring the quality of their designs remains uncompromised. Traditionally, IC design flows have been depicted as a linear ... » read more

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How To Get Accurate Inductance Extraction For Superconductor ICs

Hybrid Methodology To Extract Kinetic And Magnetic Inductances For Superconductor Technologies

Blog Review: April 10

Early Cycle Analysis And Verification Of Logical SEU Mitigation

Data Center Security Issues Widen

NoCs In 3D Space

Paradigms Of Large Language Model Applications In Functional Verification

Blog Review: Apr. 3

What’s Missing In 2.5D EDA Tools

A New Strategy For Successful Block/Chip Design-Stage Verification

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