Multi-Beam Market Heats Up


The multi-beam e-beam mask writer business is heating up, as Intel and NuFlare have separately entered the emerging market. In one surprising move, [getentity id="22846" e_name="Intel"] is in the process of acquiring IMS Nanofabrication, a [gettech id="31058" t_name="multi-beam e-beam"] equipment vendor. And separately, e-beam giant NuFlare recently disclosed its new multi-beam mask writer t... » read more

New Memory Approaches And Issues


New memory types and approaches are being developed and tested as DRAM and Moore's Law both run out of steam, adding greatly to the confusion of what comes next and how that will affect chip designs. What fits where in the memory hierarchy is becoming less clear as the semiconductor industry grapples with these changes. New architectures, such as [getkc id="202" kc_name="fan-outs"] and [getk... » read more

Is 2.5D Cheaper?


For the past several years, as 2.5D was being tested, the most common response from chipmakers and tools vendors was that the interposer used to connect various die in a package was far too expensive. It was basically the same argument as mask costs are rising too high to continue building complex planar SoCs at 16/14nm, or that FD-SOI is more expensive than bulk silicon at 28nm. The critici... » read more

What’s Next For DRAM?


The DRAM business has always been challenging. Over the years, DRAM suppliers have experienced a number of boom and bust cycles in a competitive landscape. But now, the industry faces a cloudy, if not an uncertain, future. On one front, for example, [getkc id="93" kc_name="DRAM"] vendors face a downturn amid a capacity glut and falling product prices in 2016. But despite the business chal... » read more

1xnm DRAM Challenges


At a recent event, Samsung presented a paper that described how the company plans to extend today’s planar DRAMs down to 20nm and beyond. This is an amazing feat. Until very recently, most engineers believed DRAMs would stop scaling at 20nm or so. Instead, Samsung is ramping up the world’s most advanced DRAMs—a line of 20nm parts—with plans to go even further. Micron and SK Hynix soo... » read more

Predictions For 2016: Semiconductors, Manufacturing And Design


Seventeen companies sent in their predictions for this year with some of them sending predictions from several people. This is in addition to the CEO predictions that were recently published. That is a fine crop of views for the coming year, especially since they know that they will be held accountable for their views and this year, just like the last, they will have to answer for them. We beli... » read more

The Week In Review: Manufacturing


2016 is starting off on the wrong foot. Samsung disclosed its preliminary results for the forth quarter. Samsung expects a difficult business environment in 2016, according to reports. Plus, Apple is seeing lower than expected demand. “We are lowering our March quarter iPhone units to 45M units (prior 54M) to reflect incremental softness and recent production cuts. Our sense is that iPhones a... » read more

The Week In Review: Design/IoT


EDA & IP EDA revenues increased 7.1% for Q3 2015, according to the EDA Consortium, upping the number to $1957.5 million, compared to $1828.1 million in Q3 2014. The four-quarters moving average also jumped by 8.8%. IC Physical Design & Verification saw the biggest gains, with a 14% increase compared to Q3 2014 and $407.9 million in revenue for the quarter. IP was runner up, with $652... » read more

The Week In Review: Manufacturing


South Korea’s SK Hynix led the initial charge in the development of High Bandwidth Memory (HBM), a 3D DRAM technology based on a memory stack and through-silicon vias (TSVs). SK Hynix has been shipping HBM parts in the market. Now, SK Hynix and Samsung are readying the next version of the technology, dubbed High Bandwidth Memory 2 or HMB2, according to a report from The Electronic Times of So... » read more

Manufacturing Bits: Dec. 15


DRAM scaling sans EUV At the recent IEEE International Electron Devices Meeting (IEDM) in Washington, D.C., chipmakers presented papers on several technologies, including one unlikely topic—DRAM scaling. For years, it was believed that DRAMs would hit the wall and stop scaling at 20nm or so. Then, at that point, the industry would need to migrate to a 3D DRAM structure or a next-generatio... » read more

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