tag: software

Using More Verification Cores
By Brian Bailey - 30 Aug, 2018 - Comments: 1

Semiconductor Engineering sat down to talk about parallelization efforts within EDA with Andrea Casotto, chief scientist for Altair; Adam Sherer, product management group director in the System & Verification Group of Cadence; Harry Foster, chief scientist for Mentor, a Siemens Business; Vladislav Palfy, global manager for applications engineering at OneSpin; Vigyan Singhal, chief Oski for ... » read more

Is Software Necessary?
By Brian Bailey - 27 Aug, 2018 - Comments: 0

Hardware must be capable of running any software. While that might have been a good mantra when chips were relatively simple, it becomes an impossible verification task when dealing with SoCs that contain dozens of deeply embedded processors. When does it become necessary to use production software and what problems can that get you into? When verification targets such as power are added, it... » read more

Hardware Security Threat Rising
By Ed Sperling - 02 Aug, 2018 - Comments: 0

Martin Scott, senior vice president and CTO of Rambus, sat down with Semiconductor Engineering to talk about an increasing problem with security, what's driving it, and why hardware is now part of the growing attack surface. What follows are excerpts of that conversation. SE: With Meltdown and Spectre, the stakes have changed because the focus is not on using hardware to get to software. It'... » read more

Top 6 Application Security Hurdles And The Secret To Overcoming Them
By Synopsys - 01 Aug, 2018 - Comments: 0

Applications support some of the most strategic business processes and access an organization’s most sensitive data. These applications also contain 92% of reported security vulnerabilities, not networks. Yet application security continues to receive less budget and attention than network security. This means security-aware companies must find a cost-effective application security solution to... » read more

Why Parallelization Is So Hard
By Brian Bailey - 30 Jul, 2018 - Comments: 2

Semiconductor Engineering sat down to talk about parallelization efforts within EDA with Andrea Casotto, chief scientist for Altair; Adam Sherer, product management group director in the System & Verification Group of Cadence; Harry Foster, chief scientist for Mentor, a Siemens Business; Vladislav Palfy, global manager for applications engineering at OneSpin; Vigyan Singhal, chief Oski for ... » read more

Safety, Security And PPA Tradeoffs
By Brian Bailey - 23 Jul, 2018 - Comments: 0

Safety and security are emerging as key design tradeoffs as chips are added into safety-critical markets, adding even more complexity into an already complicated optimization process. In the early days of semiconductor design, performance and area were traded off against each other. Then power became important, and the main tradeoffs became power, performance and area (PPA). But as chips inc... » read more

How To Integrate SAST Into DevSecOps With Coverity
By Synopsys - 09 Jul, 2018 - Comments: 0

To reduce your time to market, your development teams must be able to scan every build for security weaknesses and vulnerabilities without sacrificing the efficiency of your development process. How can you effectively integrate application security testing tools throughout your CI/CD pipelines to create an exceptional DevSecOps culture and build secure, high-quality software faster? Ride th... » read more

Searching For A System Abstraction
By Brian Bailey - 28 Jun, 2018 - Comments: 3

Without abstraction, advances in semiconductor design would have stalled decades ago and circuits would remain about the same size as analog blocks. No new abstractions have emerged since the 1990s that have found widespread adoption. The slack was taken up by IP and reuse, but IP blocks are becoming larger and more complex. Verification by isolation is no longer a viable strategy at the system... » read more

CEO Outlook On Chip Industry (Part 3)
By Ed Sperling - 18 Jun, 2018 - Comments: 2

Semiconductor Engineering sat down with Wally Rhines, president and CEO of Mentor, a Siemens Business; Simon Segars, CEO of Arm; Grant Pierce, CEO of Sonics; and Dean Drako, CEO of IC Manage. What follows are excerpts of that conversation. To view part one, click here. Part two is here. L-R: Dean Drako, Grant Pierce, Wally Rhines, Simon Segars. Photo: Paul Cohen/ESD Alliance SE: Securit... » read more

CEO Outlook On Chip Industry (Part 1)
By Ed Sperling - 24 May, 2018 - Comments: 1

Semiconductor Engineering sat down with Wally Rhines, president and CEO of Mentor, a Siemens Business; Simon Segars, CEO of Arm; Grant Pierce, CEO of Sonics; and Dean Drako, CEO of IC Manage. What follows are excerpts of that conversation. L-R: Dean Drako, Grant Pierce, Wally Rhines, Simon Segars. Photo: Paul Cohen/ESD Alliance SE: What are the big changes ahead, and where do you see th... » read more

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