And The Winner Is…

By Brian Bailey - 21 Dec, 2017 - Comments: 0

Finding out what resonates with our readers is important, so each year I look back through the list of the best-read articles for the channels that I write for. While this simple strategy does favor articles published during the early part of the year, the fact that our readership continues to grow, partially offsets this bias. For example, in Low Power/High Performance (LPHP) a quarter of the ... » read more

Creating Software Separation For Mixed Criticality Systems

By Mentor, a Siemens Business - 20 Dec, 2017 - Comments: 0

The continued evolution of powerful embedded processors is enabling more functionality to be consolidated into single heterogeneous multicore devices. Mixed criticality designs, those designs which contain both safety-critical and non-safety critical processes, can successfully leverage these devices and meet the regulatory requirements for IEC safety standards and the highest level of ISO. Thi... » read more

Accounting For Power Earlier

By Ann Mutschler - 14 Dec, 2017 - Comments: 5

Concerns about power usage in an SoC are far from new, but the adoption of power management techniques still varies by company and by project. Leading semiconductor providers have made the necessary changes in tooling and methodology to account for [getkc id="106" kc_name="power awareness"] because they have to, but the rest of the industry hasn't necessarily caught up. “The companies t... » read more

Enabling Synchronized Hardware Software Debug With Verdi

By Synopsys - 13 Dec, 2017 - Comments: 0

Verdi HW SW Debug is an instruction-accurate embedded processor debug solution that offers fully synchronized views between hardware, as RTL or gate-level design models, and software, as C or assembly code enabling co-debug between RTL and software. To read more, click here. » read more

The Road To Autonomous Driving Is Paved With New Opportunities For Chip Companies

By Robert Vamosi - 07 Dec, 2017 - Comments: 0

The migration from human-driven to self-driven vehicles in the next few years will provide the semiconductor industry with new opportunities. Vehicles on the road today have so far featured only a few digital enhancements and even less automation. Indeed, the most noticeable enhancements have been made in the advancement of the infotainment console within the dashboard – the ability to str... » read more

Prototyping Partitioning Problems

By Ann Mutschler - 30 Nov, 2017 - Comments: 0

Gaps are widening in the prototyping of large, complex chips because the speed and capacity of the FPGA is not keeping pace with rapid rollout pace of advanced ASICs. This is a new twist for a well-established market. Indeed, prototyping with FPGAs is as old as the [gettech id="31071" t_name="FPGAs"] themselves. Even before they were called FPGAs, logic accelerators or LCAs (logic cell ar... » read more

Understanding How To Assess Tool Confidence Levels For ISO 26262

By Synopsys - 29 Nov, 2017 - Comments: 0

ISO 26262, the automotive functional safety standard, requires the assessment of software Tool Confidence Levels (TCLs). Some SoC designers are under the impression that all tools must be classified with a TCL1. In reality, the goal is to classify your tools accurately for your specific situation and use case. This white paper provides insight on assessing TCLs that are consistent with ISO 2626... » read more

Lots Of Little Knobs For Power

By Ann Mutschler - 09 Nov, 2017 - Comments: 3

Dynamic power is becoming a much bigger worry at new nodes as more finFETs are packed on a die and wires shrink to the point where resistance and capacitance become first-order effects. Chipmakers began seeing dynamic power density issues with the first generation of [getkc id="185" kc_name="finFETs"]. While the 3D transistor structures reduced leakage current by providing better gate contro... » read more

Continuous Integration

By Zach Lasiuk - 26 Oct, 2017 - Comments: 0

In this article, I tackle the classic question engineers developing software for custom integrated circuits (ICs) grapple with constantly: How do I test my software before the hardware team gets me a working silicon chip? No ‘one size fits all’ solution is provided here (look for that alongside my pet unicorn); instead I detail an easy-to-use yet powerful approach to solve this proble... » read more

Making Software Development Equivalent For Models And Boards

By Jason Andrews - 28 Sep, 2017 - Comments: 0

Selected Cortex-M processors include the instruction trace microcell (ITM) to help understand system behavior. Although it can provide other types of trace, the ITM is commonly associated with printf() output and event tracing from applications and operating systems. Historically, Fast Model systems have used semihosting or UART models to provide character and file I/O when running software on ... » read more

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Knowledge Centers
Entities, people and technologies explored

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: software

And The Winner Is…

Creating Software Separation For Mixed Criticality Systems

Accounting For Power Earlier

Enabling Synchronized Hardware Software Debug With Verdi

The Road To Autonomous Driving Is Paved With New Opportunities For Chip Companies

Prototyping Partitioning Problems

Understanding How To Assess Tool Confidence Levels For ISO 26262

Lots Of Little Knobs For Power

Continuous Integration

Making Software Development Equivalent For Models And Boards

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Knowledge Centers
Entities, people and technologies explored