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History repeats itself, but frequently not in the exactly the same place. The problems faced by system engineering teams today—rising complexity, shorter market windows and more issues involving interactions that affect everything from dynamic power and leakage current to electromigration and finFET design—mirror the kinds of top-down issues that software developers began encountering more ... » read more

Tortuga Logic: Hardware Security


For the Internet of Things to really get rolling, it has to be bulletproof. And given the number of very high-profile security breaches in recent months, it has a long way to go before consumers or businesses will feel comfortable using any of a new wave of smart devices That concern has prompted a wave of acquisitions from companies such as Intel (McAffee), Cadence (Jasper Design Automation... » read more

Problems Ahead for EDA


Semiconductor Engineering sat down with [getperson id="11411" comment="Bill Neifert"], chief technology officer at [getentity id="22521" comment="Carbon Design Systems"]; [getperson id="11032" comment="Simon Davidmann”], chief executive officer for [getentity id="22036" e_name="Imperas”]; Randy Smith, vice president of marketing for [getentity id="22605" e_name="Sonics"] and Michel Courtoy,... » read more

The Week In Review: Design/IoT


M&A Avago appears to be on the prowl for a new acquisition. According to a Reuters report, it has made inquiries at Xilinx, Renesas and Maxim and has more than $10B to spend. Avago made a bid for Freescale earlier this year, but NXP ended up buying Freescale for $11.8B. IP Sonics unveiled the ICE-Grain Power Architecture, a power management sub-system for mainstream SoC designs that c... » read more

Trouble Ahead For IP industry?


[getkc id="106" kc_name="Power-aware design"] has risen from an afterthought to a primary design constraint for some design types. Initially it was smart phones and other battery operated devices. It has consistently expanded into additional areas including those plugged into the wall and those plugged into the grid. Some parts of the world are imposing restrictions on the power that a device c... » read more

Accelerating Development For LP


Power is a limiting factor in all devices these days, and while most of the industry has seen this coming for several process nodes and a succession of mobile devices with limited battery life, the power problem remains a work in progress. No matter how much progress is made—and there has been plenty of work done in the areas of multiple power domains, dark silicon, dynamic voltage and fr... » read more

Security Progress In Some Places, Not Others


Security is big business, and it's increasingly part of business done between big businesses in the semiconductor market. The deal that was announced this week between NXP and Qualcomm, adding a secure NFC module to the Snapdragon chip, is certainly good business. But what's really interesting about this arrangement is that it was done between two very prominent companies, which saw a potent... » read more

Problems Ahead For EDA


Semiconductor Engineering sat down with [getperson id="11411" comment="Bill Neifert"], chief technology officer at [getentity id="22521" comment="Carbon Design Systems"]; [getperson id="11032" comment="Simon Davidmann”], chief executive officer for [getentity id="22036" e_name="Imperas”]; Randy Smith, vice president of marketing for [getentity id="22605" e_name="Sonics"] and Michel Courtoy,... » read more

Problems Ahead For EDA


You may have discovered that the Semiconductor Engineering Knowledge Center (KC) provides various ways in which data can be viewed. One way is to see what events happened in a given year. During the 1990s, company activity in terms of new startups and acquisitions reached a peak, and in 1997 there were at least 29 startups that the KC contains and 25 companies acquired (let us know if there wer... » read more

Pressure Builds To Revamp The Design Flow


Without [getkc id="7" kc_name="EDA"] there would be no [getkc id="74" comment="Moore's Law"] as we know it today, and without Moore's Law there would be a much more limited need for EDA. But after more than three decades of developing design flows packed with sophisticated tools to automate semiconductor design through verification, and thereby enable feature shrinks that are the basis of Moore... » read more

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