tag: Sonics

The Week In Review: Design
By Ed Sperling - 24 Oct, 2014 - Comments: 0

IP Cadence rolled out a portfolio of stacked die memory verification IP to support Wide I/O-2, Hybrid Memory Cube, high-bandwidth memory, and DDR4-3DS. Included are direct memory access for read, write, save, preload and comparison of memory contents, assertions, error configurability, and a built-in address manager. ARM rolled out additions to its enterprise-class SoC interconnects for qua... » read more

Redefining A System…And Why It Matters
By Ed Sperling - 23 Oct, 2014 - Comments: 0

The concept of a system on chip has been around since the mid-1990s, but the actual mass implementation of this scheme is almost synonymous with the rise of the smart phone over the past decade. Put in perspective, it isn't that old, and it's about to change. Prior to the [getkc id="81" kc_name="SoC"], an electronic system was largely a collection of components on a PCB that included memory,... » read more

2.5D Timetable Coming Into Focus
By Ed Sperling - 23 Oct, 2014 - Comments: 0

After years of empty promises, the timetable for [getkc id="82" kc_name="2.5D"] is coming into better focus. Large and midsize chipmakers are behind it, real silicon is being developed, and contracts are being signed. That doesn't mean all of the pieces are in place or that market uptake is at the neck of the hockey stick. And it certainly doesn't mean the semiconductor industry is going to ... » read more

Why Is My Device Better Than Yours?
By Ed Sperling - 23 Oct, 2014 - Comments: 0

Differentiation is becoming a big problem in the semiconductor industry with far-reaching implications that extend well beyond just chips. The debate over the future of [getkc id="74" comment="Moore's Law"] is well known, but it's just one element in a growing list that will make it much harder for chip companies, IP vendors and even software developers to stand out from the pack. And withou... » read more

Are Models Holding Back New Methodologies
By Brian Bailey - 23 Oct, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss the state of the industry for [getkc id="101" kc_name="modeling"] at abstractions above [getkc id="49" kc_name="RTL"], a factor which has delayed adoption of [getkc id="104" kn_name="virtual prototypes"] and the proliferation of system-level design and hardware/software codesign. Taking part in the discussion were Frank Schirmeister, group director,... » read more

Blog Review: Oct. 22
By Ed Sperling - 22 Oct, 2014 - Comments: 0

What is UX? The User Experience, of course. Rambus' Aharon Etengoff notes that the IoT UX is now the subject of a Harvard Business Review article. A long list of hurdles are expected at the 10nm process node, including multiple levels of local interconnects, more complex layout rules, timing problems, and a slew of others. Cadence's Richard Goering puts it all in perspective. Mentor's R... » read more

The Week In Review: Design
By Ed Sperling - 03 Oct, 2014 - Comments: 0

IP ARM introduced a new software platform and a free operating system aimed at IoT development. The OS incorporates security, communication and device management features for improved energy efficiency. The device server simplifies the connection and management of devices, incorporating security and improving efficiency. Cadence rolled out a broad IP portfolio for TSMC's 16nm platform, and ... » read more

Blog Review: Oct. 1
By Ed Sperling - 01 Oct, 2014 - Comments: 0

Cadence's Richard Goering writes about a pair of IEEE working groups that are focused on standardizing ways to lower power of software and firmware. The importance of this effort is huge. Mentor's J. VanDomelen looks at the use of 3D printers in outer space. This is a new chapter in manufacturing custom parts in extreme environments. Synopsys' Mick Posner gets an unexpected answer to a ro... » read more

Tech Talk: IP Integration
By Ed Sperling - 27 Sep, 2014 - Comments: 0

Sonics CTO Drew Wingard talks about the challenges of integrating IP into SoCs and what typically goes wrong. [youtube vid=T1FAPDqIJK8] » read more

The Real Numbers: Redefining NRE
By Ed Sperling - 26 Sep, 2014 - Comments: 0

Developing ICs at the most advanced nodes is getting more expensive, but exactly how much more expensive is the subject of debate across the semiconductor industry. There are a number of reasons for this discrepancy. Among them: As design flows shift from serial to parallel, it's hard to determine which groups within companies should be saddled with different portions of the bill. The re... » read more

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