IP That Makes IP Work


By Frank Ferro Just how important are IP subsystems to complex SoC designs? It appears much more than you may have thought just a few months ago. With the emergence of SoCs that now support the cloud computing revolution and every major cloud-connected device, SoC complexity is increasing at a dizzying pace. We commonly now see increasing number of IP cores, cores from multiple sources, di... » read more

Roundtable: DAC Retrospective


Is DAC really a design automation conference, or has it shifted to a design enablement conference due to rising complexity breaking down traditional barriers and silos? Low Power High Performance Engineering talks with Atrenta CTO Bernard Murphy about the changes. [youtube vid=Z_xBaRsC_Hs] » read more

EDA’s Cloudy Vision


By Ann Steffora Mutschler Since the dawn of EDA, the industry has largely operated under a traditional software distribution model whereby the customer would run the software it licensed on its own hardware equipment. With the sophistication of advanced IT management techniques as well as education surrounding “The Cloud,” it may be safe to predict that engineers in the not-to-distant futu... » read more

System-Level Models Redefined


By Ann Steffora Mutschler It wasn’t that long ago that the promise of system-level models was an easy implementation path and the ability to then reuse the models in a different design, for a different target application. But how reusable are those models in reality? The answer depends on whom you ask. First, it is important to define what a system-level model is, noted Frank Schirrmeiste... » read more

Clearing Up Cloud-Based SoCs


By Frank Ferro With each passing month, the cloud is taking the semiconductor market by storm—just like it did in the enterprise years ago. Take nVidia’s recent Kepler GPU announcement for cloud computing. This device provides low-latency access to the cloud for gaming, giving gamers performance and access to the latest content without being tied to a game console. Another example is Appli... » read more

Tech Talk: Cloud-Scale SoCs


Sonics CTO Drew Wingard talks about what's changing in SoC design as performance ramps up on mobile devices and power is ratcheted down to save battery life. [youtube vid=cdzhFCsLyyI] » read more

Gap Vs. Gap


By Ed Sperling Among tools vendors it’s been standard practice to listen closely to customers but not deliver everything they ask for—or at least not always on the customers’ timetable. This strategy has worked well enough for both sides in the past, but at 20nm and in stacked die configurations, the level of tension between these two worlds is increasing, and the gaps in the tool cha... » read more

The Interconnect Game


By Ed Sperling Having a single bus protocol is something most SoC engineers can only dream about. Reality is often a jumble of protocols determined by the IP they use, which can slow down a design’s progress. The problem stems largely from re-use and legacy IP. While it might be convenient to use only on an AXI standard protocol from ARM, most chips are a combination of IP tied to specif... » read more

A Cloud-Connected World


By Frank Ferro If you're paying attention and/or using a smart phone every day (and perhaps it's safer to assume the latter) the ‘cloud’ is no longer a buzzword. The cloud has become grounded in our daily reality. How’s that for a paradox and a visual? But at a minimum, it has become more like a punch line in every consumer's day—without even thinking about it. Projections show that... » read more

Managing Complexity With Advanced Packaging


By Ann Steffora Mutschler Engineering teams across the globe continue to pound the process geometry treadmill to stay on the curve of Dr. Moore to achieve better speed or lower power or smaller die—and it all adds up to increased complexity in the design and packaging. However, with advanced forms of die stacking such as package-on-package, silicon-in-package, 2.5D silicon interposer techno... » read more

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