tag: subsystems

What Goes Wrong With IP
By Ed Sperling - 31 Dec, 2015 - Comments: 0

Semiconductor Engineering sat down to talk about the future of IP with Rob Aitken, R&D fellow at [getentity id="22186" comment="ARM"]; Mike Gianfagna, vice president of marketing at [getentity id="22242" e_name="eSilicon"]; Judd Heape, vice president of product applications at Apical; and Bernard Murphy, an independent industry consultant. What follows are excerpts of that discussion, which... » read more

The Memory And Storage Hierarchy
By Loren Shalinsky - 13 Aug, 2015 - Comments: 0

The memory and storage hierarchy is a useful way of thinking about computer systems, and the dizzying array of memory options available to the system designer. Many different parameters characterize the memory solution. Among them are latency (how long the CPU needs to wait before the first data is available) and bandwidth (how fast additional data can be “streamed” after the first data poi... » read more

What Is A System Now?
By Ann Mutschler - 25 Jun, 2015 - Comments: 0

Defining a system used to be relatively straightforward. But as systems move onto chips, and as those chips increasingly are connected with applications and security spanning multiple devices, the definition is changing. This increases the complexity of the design process itself, and it raises questions about how chips and software will be designed and defined in the age of the [getkc id="76... » read more

IP Integration Challenges Increase
By Ed Sperling - 24 Jun, 2015 - Comments: 0

Semiconductor Engineering sat down with Chris Rowen, CTO of [getentity id="22032" e_name="Cadence"]'s IP group; Rob Aitken, an [getentity id="22186" comment="ARM"] fellow; Patrick Soheili, vice president of product management and corporate development at [getentity id="22242" e_name="eSilicon"]; Navraj Nandra, senior director of marketing for DesignWare analog and mixed-signal IP at [getentity ... » read more

IP Integration Challenges Increase
By Ed Sperling - 16 Jun, 2015 - Comments: 0

Semiconductor Engineering sat down with Chris Rowen, CTO of [getentity id="22032" e_name="Cadence"]'s IP group; Rob Aitken, an [getentity id="22186" comment="ARM"] fellow; Patrick Soheili, vice president of product management and corporate development at [getentity id="22242" e_name="eSilicon"]; Navraj Nandra, senior director of marketing for DesignWare analog and mixed-signal IP at [getentity ... » read more

What’s Really Inside?
By Ed Sperling - 04 Jun, 2015 - Comments: 2

Is it just paranoia, or do devices ranging from industrial controls to military hardware really contain malicious code, Trojan Horses, and remotely triggered back doors? The answer is "maybe not" if you're an optimist, and "maybe" if you're a pessimist, but no one really knows for sure. And that's what really worries security experts, particularly as more devices are connected to other devices.... » read more

IP Market Shifts Direction
By Ed Sperling - 03 Jun, 2015 - Comments: 0

Semiconductor Engineering sat down to discuss intellectual property changes and challenges with Patrick Soheili, vice president of product management and corporate development at [getentity id="22242" e_name="eSilicon"]; Navraj Nandra, senior director of marketing for DesignWare analog and MSIP at [getentity id="22035" e_name="Synopsys"]; Kurt Shuler, vice president of marketing at [getentity i... » read more

What Not To Verify
By Ann Mutschler - 23 Apr, 2015 - Comments: 0

It is well understood that [getkc id="10" kc_name="verification"] is all about mitigating and managing risk, and success here begins with a good verification planning process. During the planning process, the project team creates a list of specific design functions and use cases that must be verified—and they identify the technique used to verify each specific item on the list. That list c... » read more

Is Art Acceptable In Verification?
By Brian Bailey - 23 Apr, 2015 - Comments: 0

The industry appears to have accepted that [getkc id="10" kc_name="verification"] involves art as well as science. This is usually based on one of three reasons, namely: the problem is large and complex; there is a lack of understanding and tools that enable it to be automated; and if it could be made a science, all of the jobs would have migrated offshore. Today, designs are built from pre-... » read more

Developing High-Performance, Low-Power Audio/Voice Subsystems Using Customizable DSP Blocks And Audio Interface IP
By Cadence - 14 Jan, 2015 - Comments: 0

As applications such as mobile gaming and voice triggering grow in popularity, audio/voice subsystems are becoming more important in many mobile system-on-chip (SoC) designs. Subsystem requirements have evolved to address multiple demands: high-performance, high-resolution audio stream processing, and always-on, low-power voice trigger and recognition. This white paper describes how customizabl... » read more

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