Hybrid Bonding Makes Strides Toward Manufacturability

By Laura Peters - 28 Oct, 2024 - Comments: 0

Hybrid bonding is gaining traction in advanced packaging because it offers the shortest vertical connection between dies of similar or different functionalities, as well as better thermal, electrical and reliability results. Advantages include interconnect scaling to submicron pitches, high bandwidth, enhanced power efficiency, and better scaling relative to solder ball connections. But whil... » read more

Hybrid Bonding Moves Into The Fast Lane

By Laura Peters - 21 Jul, 2022 - Comments: 1

The industry’s unquenchable thirst for I/O density and faster connections between chips, particularly logic and cache memory, is transforming system designs to include 3D architectures, and hybrid bonding has become an essential component in that equation. Hybrid bonding involves die-to-wafer or wafer-to-wafer connection of copper pads that carry power and signals and the surrounding diele... » read more

Week In Review: Manufacturing, Test

By Mark LaPedus - 03 Apr, 2020 - Comments: 0

Fab tool shipping costs The coronavirus is impacting semiconductor equipment companies. Many have withdrawn their previous forecasts. “It has also led to a rise in shipping costs,” said Krish Sankar, an analyst with Cowen, in a research note. Most semiconductor equipment and components are shipped via air, according to Sankar. The exception is flat-panel display equipment and other sys... » read more

Lithography Challenges For Fan-out

By Mark LaPedus - 12 Feb, 2019 - Comments: 3

Higher density fan-out packages are moving toward more complex structures with finer routing layers, all of which requires more capable lithography equipment and other tools. The latest high-density fan-out packages are migrating toward the 1µm line/space barrier and beyond, which is considered a milestone in the industry. At these critical dimensions (CDs), fan-outs will provide better per... » read more

Litho Options For Panel Fan-out

By Mark LaPedus - 06 Nov, 2017 - Comments: 2

Several packaging houses are inching closer to production of panel-level fan-out packaging, a next-generation technology that promises to reduce the cost of today’s fan-out packages. In fact, ASE, Nepes, Samsung and others already have installed the equipment in their panel-level fan-out lines with production slated for 2018 or so. But behind the scenes, panel-level packaging houses contin... » read more

Inside Panel-Level Fan-Out Technology

By Mark LaPedus - 11 Sep, 2017 - Comments: 0

Semiconductor Engineering sat down to discuss panel-level fan-out packaging technology with Tanja Braun, deputy group manager at the Fraunhofer Institute for Reliability and Microintegration IZM, and Michael Töpper, business development manager at Fraunhofer IZM. Braun is responsible for the Panel Level Packaging Consortium at Fraunhofer IZM, as well as the group manager for assembly and encap... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.