tag: Synopsys

Defining Chip Threat Models To Identify Security Risks
By Adam Kovac - 01 Aug, 2024 - Comments: 0

Experts At The Table: As hardware weaknesses have become a major target for attackers, the race to find new ways to strengthen chip security has begun to heat up. But one-size does not fit all solution. To figure out what measures need to be taken, a proper threat model must be assessed. Semiconductor Engineering sat down with a panel of experts at the Design Automation Conference in San Franci... » read more

Blog Review: July 31
By Jesse Allen - 31 Jul, 2024 - Comments: 0

Cadence's Jasmine Makhija explains how to boost the performance of CXL 3.0 by using NOP (No Operation) Insertion Hints in latency-optimized 256B Flit Mode, which enables the system to quickly revert to the low-latency path after temporarily switching to a higher-latency path due to error correction needs. Synopsys' Robert Fey finds that by automatically and dynamically linking requirements a... » read more

Requirements and Best Practices for Trustworthy Automotive Semiconductors
By Synopsys - 31 Jul, 2024 - Comments: 0

The complexity of electronic systems supporting Advanced Driver Assistance Systems (ADAS), Highly Automated Driving (HAD), and in-vehicle infotainment is growing exponentially. This, together with the move from multiple domain-specific Electronic Control Units (ECUs) to a zonal architecture will require high-performance computing. Furthermore, new use cases for Battery Electric Vehicles (BEV) i... » read more

Chip Industry Week In Review
By The SE Staff - 26 Jul, 2024 - Comments: 0

The U.S. Department of Commerce and Amkor Technology signed a deal to provide up to $400 million in funding, under the CHIPS and Science Act, to build a previously announced end-to-end advanced packaging plant. The combined funding is expected to total about $2 billion. The new facility will add some 2,000 jobs in Peoria, Arizona. The SK hynix Board approved its Yongin Semiconductor Cluster... » read more

Will AI Disrupt EDA?
By Brian Bailey - 25 Jul, 2024 - Comments: 1

Generative AI has disrupted search, it is transforming the computing landscape, and now it's threatening to disrupt EDA. But despite the buzz and the broad pronouncements of radical changes ahead, it remains unclear where it will have impact and how deep any changes will be. EDA has two primary roles — automation and optimization. Many of the optimization problems are NP hard, which means ... » read more

Floor-Planning Evolves Into The Chiplet Era
By Karen Heyman - 25 Jul, 2024 - Comments: 0

3D-ICs and heterogeneous chiplets will require significant changes in physical layout tools, where the placement of chiplets and routing of signals can have a big impact on overall system performance and reliability. EDA vendors are well aware of the issues and working on solutions. Top on the list of challenges for 3D-ICs is thermal dissipation. Logic typically generates the most heat, and ... » read more

Enhancing RTL Design Efficiency: The Power And Benefits Of Integrated Development Environments
By Eldon Nelson - 25 Jul, 2024 - Comments: 0

In today's rapidly evolving semiconductor design landscape, efficiency and productivity are integral to success. It is here that Integrated Development Environments (IDEs) are making a significant impact. These software suites are much more than programming environments where designers input text or code. They represent a comprehensive ecosystem of tools, utilities, and functionalities, all des... » read more

What’s Next In System-Level Design?
By Ann Mutschler - 25 Jul, 2024 - Comments: 0

Experts At The Table: EDA has undergone numerous workflow changes over time. Different skill sets have come into play over the years, and at times this changed the definition of what it means to design at the system level. Semiconductor Engineering sat down to discuss what this means for designers today, and what the impact will be in the future, with Michal Siwinski, chief marketing officer at... » read more

Toward Software-Defined Vehicles
By Ed Sperling - 24 Jul, 2024 - Comments: 0

Speed is everything when it comes to designing automotive electronics, but not in the usual way. In the past, product cycles often lasted five to seven years, from initial design to implementation inside of vehicles. That no longer works as vehicles adopt more electronic features to replace mechanical ones, and as competition heats up over the latest features and nearly instantaneous over-the-a... » read more

Unifying Storage Diversity: Leveraging PCIe IP for Multi-Device, Multi Form Factor Designs
By Synopsys - 24 Jul, 2024 - Comments: 0

In the fast-paced world of data storage, designers are racing to keep up with ever-evolving interface standards and form factors. This whitepaper explores the impact of these industry shifts, focusing on the integration of PCIe interfaces within the context of varying storage device form factors like the Enterprise and Datacenter Standard Form Factor (EDSFF). PCIe designs need to be flexible in... » read more

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