Content And Gaming Drive Design

By Ed Sperling - 17 Nov, 2011 - Comments: 0

By Pallab Chatterjee This year’s IEDM conference will feature a non-device topic for the luncheon keynote from Masaaki Tsuruta, CTO of Sony on Interactive Gaming. The takeaway: Even in the heavy R&D and physics-centric world of devices, building for the end application has now become one of the top priorities in driving specifications. Traditional compute systems were based on batch-... » read more

Finer Control, Same Ideas

By Ed Sperling - 22 Sep, 2011 - Comments: 0

Famed lawyer Clarence Darrow once said, “History repeats itself, and that’s one of the things wrong with history.” While that basic theme has been argued throughout the history of civilization—smart people are supposed to learn from other people’s mistakes, not just their own—there's an interesting twist when it comes system-level design. We are using the same technological appro... » read more

Virtual Prototyping Takes Off

By Ed Sperling - 30 Jun, 2011 - Comments: 0

By Ann Steffora Mutschler Skyrocketing software development costs, which for years have been “somebody else’s problem,” are now firmly part of the SoC development teams list of headaches. That has made virtual prototyping far more popular, particularly at 40nm and beyond, where engineers are looking at this approach as a way of managing complexity, doing architectural exploration and eve... » read more

Tech Talk: Sonics CTO

By Ed Sperling - 07 Jun, 2011 - Comments: 0

Drew Wingard peels back the covers on dark silicon, the next big thing in semiconductors and what's needed to get there in a candid discussion with System-Level Design. [youtube vid=ciWTa2HGCkE] » read more

Keeping Up With Complexity

By Ed Sperling - 31 Mar, 2011 - Comments: 0

By Ed Sperling There are two schools of thought in designing complex SoCs. One says that increasing complexity requires a higher level of abstraction. The other says providing enough detail to get the design right is the only effective way to do it. There are staunch proponents of both approaches, but what has been missing are bridges to tie the higher level of abstraction to the more labo... » read more

Drone Design Challenges

By Ed Sperling - 21 Jan, 2011 - Comments: 0

System-Level Design talks with Bob Bluth of the Naval Postgraduate School about UAV design and debug challenges--and what's inside of these devices. (The blue and green cellophane tape seal some of the access points prior to delivery--and the directions). [youtube vid=wTsehbWwC8o] » read more

System-Level Technology Conversations Shift To Deployment

By Ann Mutschler - 16 Dec, 2010 - Comments: 0

While much has been achieved to define a system-level design flow, more is still needed. Technology goals vary depending on the perspective of tool providers in terms of what needs to be done to realize the promise of a streamlined tool flow from TLM 2.0 down to GDS II. To many, 2011 will be an interesting year in the system-level design space as conversations with customers have shifted. �... » read more

The Ever-Growing System Challenge

By Jon McDonald - 10 Dec, 2010 - Comments: 0

It used to be easy to define a system. It was an ASIC, an ASSP or even an SoC. Increasingly, however, that definition isn’t nearly broad enough. With power issues now spreading across an entire device and software being used to manage everything from embedded applications to board-level functionality, the system is now much bigger than a single chip or even a system in package. It now enc... » read more

Verifying At The System Level

By Ed Sperling - 18 Nov, 2010 - Comments: 0

By Ed Sperling Verification has always been the problem child of SoC design. It requires the most engineering resources, the largest block of time and the biggest budget in the design process. And at each new process node the problem gets bigger, in part because there is more stuff on each die—transistors, memory, interconnects, I/O, functionality—and in part because chipmakers are being c... » read more

Building A Better Team

By Ed Sperling - 25 Aug, 2010 - Comments: 0

One-On-One with IDT CEO Ted Tewskbury: How IDT is bridging the analog and digital engineering worlds with a mixed-signal team approach. [youtube vid=TRfJ5a3WJrw] » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: system-level design