Virtual Prototyping Takes Off

Compression of time-to-market schedules and complexity on the software side are forcing big changes in how engineering teams work.

popularity

By Ann Steffora Mutschler
Skyrocketing software development costs, which for years have been “somebody else’s problem,” are now firmly part of the SoC development teams list of headaches. That has made virtual prototyping far more popular, particularly at 40nm and beyond, where engineers are looking at this approach as a way of managing complexity, doing architectural exploration and even performing very early functional verification using abstract models.

These models are meant to provide the design team with a view of the device and its environment at varying levels of accuracy, depending on the user requirements. The hardware model can then be executed within the virtual platform with device drivers to enable concurrent hardware/software development, rather than waiting to write the software until after the silicon came from the fab.

“We see customers going through this interesting next leap of adoption,” said Steve Brown, director of product marketing for system design and verification at Cadence. “Our perspective is that the market has experimented with commercial virtual prototyping tools for the last several years, and through that process the normal discovery of the real requirements has been going on. What I see happening is a real breakpoint where the problem the customer has is now so significant that they are rushing almost in desperation to find anything that can help them with the problem of software and multicore, and the set of challenges that come with that.”

Looking at how virtual prototyping is used today, Marc Serughetti, director of product marketing for virtual prototyping at Synopsys noted, “You have to go back to where the value is. Where does it make sense? What do you get out of those virtual prototypes? If you look at the range of customers we are talking about, the first group of customers—the semiconductor companies—this is where it starts. Especially in markets like wireless and consumer you really have a lot of pressure on the timeline, needing to make sure that the software is going to run fine on the hardware. The whole concept here is starting my software development much earlier. In semiconductor companies that means before any form of RTL is available. That’s really the starting point for all of this—doing software development earlier.”

Earlier doesn’t just mean shifting the development schedule to start sooner so you can finish on time. It also means finding ways to increase efficiency of the software development because the hardware platform complexity is growing, the software content is growing, but schedules are not shrinking.

Some users build their virtual prototypes themselves, but there might be a split within the customer community. For example, a modeling group may be involved in creating the virtual prototypes while an internal set of consumers such as the software engineers within the company actually use it.

“There are various ways of how a virtual prototype gets created,” said Shabtay Matalon, ESL market development manager at Mentor Graphics. “They can be created within a company, they can be created in a partnership between a company and an EDA vendor, but there is clearly a separation between those that are involved in the creation process and those that are on the software side that are using it, which usually are not involved in the creation process.”

Bill Frome, virtual platform manager at Texas Instruments, noted that his company has been leveraging virtual platforms for a number of generations of chips starting back to OMAP 1 days and now currently in OMAP 5.

“The focus has been on leveraging that time from pre-silicon development so we can begin verifying our software and more of our functionality before we actually get to silicon. Like a lot of companies we’ve got shorter and shorter cycle times as far as getting customers into production, so we are seeking to leverage that virtual platform to get more software running sooner to reduce cycle times. That’s really a key for us,” Frome said.

TI has been partnering with Synopsys on its virtual platform development to create the platforms. In some cases Synopsys develops the models for TI and in others TI develops the models. Then Synopsys does the final platform integration and turns it back over to TI.

“There are some other third parties that come in there as well including ARM,” said Frome. “We essentially take that final platform and then internally, we unleash our developers on that to where we can actually boot software on there, begin running some of our use cases before we get to the silicon level,” Frome continued.

Throughout the process communication is critical. Frome noted that there is definitely a communication path as far as when the architects are developing the specs. The specs are shared with the users so they can understand what that model is intended to do. Then, as a model is created, there is a feedback channel because the engineers developing the models may have questions about specific details. The final level of communication involves verification, when the models are actually being utilized.

“What we’ve seen is if we have really well written specs and there is good communication between the architects and the model developers, by the time we get to the final model, that usually goes fairly smoothly—it’s more a clarification,” said Frome. “There will be some updates that need to happen but they are fairly minor in nature at that point.”

Rules of engagement changing
None of this is done in a vacuum, however. The rules of business engagement are constantly changing. Kurt Shuler, director of marketing at Arteris, says some cell phone vendors that design their own chips are now providing requirements to their semiconductor suppliers. “They are communicating very specifically to the chip provider about the specific requirements and they are in the process of using the platform architect-type tools to say, ‘Here’s the scenario, give me a model of your [chip] and I will tell you back what changes I want you to make to your hardware to make it better for me.’ That is a totally new thing.”

Marc Serughetti, director of product marketing for virtual prototyping at Synopsys confirmed this activity. “There is definitely some of this happening. And that happens not only on the software side, but on the architecture of the SoC, too. They want to give feedback as early as possible in terms of making sure that what they have as software will run efficiently on the hardware they are getting from the semiconductor company. So we are definitely seeing this request going back and forth. One reason is to make sure the hardware and whatever software you’re getting from the semiconductor maker meets your requirements, but also to start developing that software earlier. In some markets, like consumer and wireless, it is so competitive that a two-month difference can be huge. The earlier they can start, the better.”

Some go as far as saying these business engagement changes are exactly why ESL is happening now.

“This is the key reason ESL and virtual prototyping is becoming a reality now,” asserted Mentor’s Shabtay Matalon. “In the current level of competitiveness that exists in the marketplace and the complexity and the amount of software that is embedded in each one of those devices, the software people don’t want to be treated as the afterthought in the design cycle. The only way that they will become part of it is if they get models not only before the boards are done and before the processors are fabricated, but even before the RTL is implemented. As soon as they know there is a set of processors that are in the works, they want to participate. They are putting significant pressure on the semis to give them early models of their designs even before RTL is solidified so they can influence the RTL.”