EDAC Changes Name


The EDA Consortium today changed its name to the Electronic System Design Alliance, a move that expands the group's charter to reflect shifts that have been underway in the chip design world for some time. Those shifts include the growth in IP and an increased focus on software development. Classic EDA, from place and route to synthesis to back-end debug and verification, are still very much... » read more

What Cognitive Computing Means For Chip Design


Cognitive computing. Artificial intelligence. Machine learning. All of these are concepts aim to make human types of problems computable, whether it be a self-driving car, a health care-providing robot, or a walking and talking assistant robot for the home or office. R&D teams around the world are working to create a whole new world of machines more intelligent than humans. Designing sys... » read more

Planes, Cars, And Lagging Standards


Automotive and aerospace standards are struggling to adapt to pervasive connectivity, increased functionality, and new packaging approaches and architectures, leaving chipmakers and systems vendors unsure about what needs to be included in future designs. Each of these markets has a reputation for being lumbering and unresponsive, in part because they deal with safety-critical issues and i... » read more

A Formal Transformation


A very important change is underway in functional verification. In the past, this was an esoteric technology and one that was difficult to deploy. It was relegated to tough problems late in the verification cycle, and it was difficult to justify the ROI unless the technology actually did find some problems. But all of that has changed. Formal verification companies started to use the technology... » read more

Coherency, Cache And Configurability


Coherency is gaining traction across a wide spectrum of applications as systems vendors begin leveraging heterogeneous computing to improve performance, minimize power, and simplify software development. Coherency is not a new concept, but making it easier to apply has always been a challenge. This is why it has largely been relegated to CPUs with identical processor cores. But the approach ... » read more

The Making Of A System Architect


I mentor young people from the University of Illinois at Urbana-Champaign, where I got my MSEE. When I talk to them, they tell me they’re applying for chip architecture jobs. But when they graduate with their computer science degrees they all get channeled into verification jobs. Why verification jobs rather than architecture jobs? Because they don’t have a feel for the full architecture. T... » read more

Are Simulation’s Days Numbered?


In the latest EDAC report, the value of IP surpassed the value of CAE tools for the first time. Verification tools are an important part of establishing confidence in IP blocks and simulation has been the mainstay of that IP verification strategy. But simulation is under increasing pressure, particularly for full-chip and SoC verification, because it has failed to scale. While it still remains ... » read more

What’s After Smartphones?


One of the unique things about the semiconductor industry is that it has fueled the digital revolution almost entirely by focusing on its core competencies of performance, power and area. There are few, if any, industries that can tie global growth and success to what amounts to an almost isolationist business model. Salespeople have to sell those chips, of course. Marketers have to create ... » read more

Masters Of Abstraction


Good system designers are a unique breed. While it's easy enough to distinguish the traits that define a good one from a weak one, it's much harder to determine who possesses those traits before they are put to the test, or whether or how they can be taught. However, there is definitely a particular perspective that good system designers hold in common. The key is the ability to work with ma... » read more

UVM: It’s Organized And Systematic


One of the reasons I like using UVM is its tendency toward an organized structure and uniformity. Some may find it annoying to adhere to such a strict format in UVM, but I think it’s a good way to keep the basics of UVM engrained in your brain. You always want a good foundation and development of strong fundamentals in any endeavor. Verification is no different and UVM hammers the fundamental... » read more

← Older posts Newer posts →