Wirebond Technology Rolls On


Several years ago, many predicted the demise of an older interconnect packaging technology called wire bonding, prompting the need for more advanced packaging types. Those predictions were wrong. The semiconductor industry today uses several advanced packaging types, but wire bonding has been reinvented over the years and remains the workhorse in packaging. For example, Advanced Semiconducto... » read more

2.5D Adds Test Challenges


OSATs and ATE vendors are making progress in determining what works and what doesn't in 2.5D packaging, expanding their knowledge base as this evolves into a mainstream technology. A [getkc id="82" kc_name="2.5D"] package generally includes an ASIC connected to a stack of memory chips—usually high-bandwidth memory—using an [getkc id="204" kc_name="interposer"] or some type of silicon bri... » read more

OSAT Biz: Growth And Challenges


Amid a challenging business environment, the outsourced semiconductor assembly and test (OSAT) industry is projected to see steady to strong growth in a number of packaging segments this year. Right now, the [getkc id="83" kc_name="OSATs"]—which provide third-party IC-packaging and test services—are seeing brisk demand for both legacy and advanced chip packages. In addition, IDMs continu... » read more

Fan-Out Packaging Gains Steam


Fan-outs are creating a buzz and gaining steam in the market at a pace far beyond what anyone would have expected even at the start of the year. The approach, which has been around for several years, is a wafer-level packaging process that enables ultra-thin, high-density packages. So why the buzz? Apple is apparently moving to [getkc id="202" kc_name="fan-out"] packaging, according to an... » read more

What China Is Planning


Over the years, China has unveiled several initiatives to advance its domestic semiconductor industry. China has made some progress at each turn, although every plan has fallen short of expectations. But now, the nation is embarking on several new and bold initiatives that could alter the IC landscape. China’s new initiatives address at least three key challenges for its IC industry: 1. C... » read more

Advanced IC Packaging Biz Heats Up


After a number of false starts and lackluster adoption, the advanced IC packaging market is finally heating up. On one front, for example, a new wave of chips based on advanced [getkc id="82" kc_name="2.5D"]/[getkc id="42" kc_name="3D"] stacked-die is entering the market. And on another front, the momentum is building for new and advanced 2D packages, such as embedded package-on-package (PoP... » read more

Fab Tool Biz Faces Challenges In 2015


After a slight downturn in 2013, the semiconductor equipment industry rebounded and experienced a solid upturn in 2014. The recovery was primarily driven by tool spending in the foundry and [getkc id="93" kc_name="DRAM"]sectors. Another big and ongoing story continued to unfold in 2014. In late 2013, [getentity id="22817" e_name="Applied Materials"] announced a definitive agreement to acquir... » read more

Mobile Packaging Market Heats Up


Apple, Samsung and others are developing the next wave of smartphones and tablets. OEMs want to cram more chip functions in smaller IC packages, but there are some challenges in the arena. In fact, there are signs that the mainstream packaging technology for mobiles is running out of steam. For some time, mobile products have incorporated a technology called package-on-package (PoP), which u... » read more

Semicon West Preview: Packaging


By Paula Doe The evolving mobile device market means the packaging, assembly and test supply chain faces a growing range of alternative technologies vying for its investment dollar, everything from Google’s modular electronics with 3D printing, to more solutions for integrating varied chips in smaller packaged systems. One potentially disruptive change is the wider use of more open-source... » read more

Time To Revisit 2.5D And 3D


Chipmakers are reaching various and challenging inflection points. In logic, many IC makers face a daunting transition from planar transistors at 20nm to finFETs at 14nm. And on another front, the industry is nearing the memory bandwidth wall. So perhaps it’s time to look at new alternatives. In fact, chipmakers are taking a hard look, or re-examining, one alternative—stacked 2.5D/3D chi... » read more

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