The Race To Much More Advanced Packaging

By Mark LaPedus - 23 Jul, 2020 - Comments: 2

Momentum is building for copper hybrid bonding, a technology that could pave the way toward next-generation 2.5D and 3D packages. Foundries, equipment vendors, R&D organizations and others are developing copper hybrid bonding, which is a process that stacks and bonds dies using copper-to-copper interconnects in advanced packages. Still in R&D, hybrid bonding for packaging provides mo... » read more

Finding Defects In IC Packages

By Mark LaPedus - 17 Dec, 2019 - Comments: 0

Several equipment makers are ramping up new inspection equipment to address the growing defect challenges in IC packaging. At one time, finding defects in packaging was relatively straightforward. But as packaging becomes more complex, and as it is used in markets where reliability is critical, finding defects is both more difficult and more important. This has prompted the development of a ... » read more

Week In Review: Manufacturing, Test

By Mark LaPedus - 31 May, 2019 - Comments: 0

Trade wars The trade war between the United States and China is escalating and it is here to stay. Victor Davis Hanson, a senior fellow at think tank Hoover Institution, said the United States is at a crossroads with China. It could define America’s security and the international order for decades to come. Here’s the latest blog on trade tensions between the U.S. and China. “Tensions ... » read more

The Week In Review: Manufacturing

By Mark LaPedus - 09 Mar, 2018 - Comments: 0

Chipmakers and OEMs After more than four years as chief executive of GlobalFoundries, Sanjay Jha will hand over the company’s top position to Thomas Caulfield, senior vice president and general manager at the foundry vendor. Caulfield, who joined GlobalFoundries in 2014, will become CEO. He has been running the company's fab in New York. "Jha intends to work closely with the company’s shar... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: TechSearch

The Race To Much More Advanced Packaging

Finding Defects In IC Packages

Week In Review: Manufacturing, Test

The Week In Review: Manufacturing