tag: Teradyne

Identifying Sources Of Silent Data Corruption
By Laura Peters - 08 May, 2025 - Comments: 0

Silent data errors are raising concerns in large data centers, where they can propagate through systems and wreak havoc on long-duration programs like AI training runs. SDEs, also called silent data corruption, are technically rare. But with many thousands of servers, which contain millions of processors running at high utilization rates, these damaging events become common in large fleets. ... » read more

Chip Complexity Drives Innovation In Automated Test Equipment
By Jeorge Hurtarte - 08 May, 2025 - Comments: 0

Innovations in semiconductor technology—such as advancements in AI high-performance computing (HPC), Angstrom-scale silicon process nodes, silicon photonics, and automotive xEV wideband gap power transistor applications—require automated test equipment (ATE) to evolve at an unprecedented rate. As chip complexity grows, the challenges in design, manufacturing, and test multiply. It is a comp... » read more

Hunting For Macro Defects
By Anne Meixner - 08 Apr, 2025 - Comments: 0

Detecting macro-defects early in the wafer processing flow is vital for yield and process improvement, and it is driving innovations in both inspection techniques and wafer test map analysis. At the wafer level, a macro-defect can affect more than one die, and in some cases large regions of a wafer. Finding macro defects can indicate a significant issue with a process module, a particular fi... » read more

Chip Industry Week In Review
By The SE Staff - 04 Apr, 2025 - Comments: 0

Check out our new Inside Chips podcast. President Trump’s ‘Liberation Day’ tariffs were announced this week. The executive order stated that semiconductors and copper imports are not directly subject to the reciprocal tariff, although the exemption may be short-lived. Semiconductor equipment and tools were not mentioned, leaving the industry searching for clarification. Regardless, hig... » read more

Need For KGD Drives Singulated Die Screening
By Anne Meixner - 31 Mar, 2025 - Comments: 0

The move to multi-die packaging is driving chipmakers to develop more cost-effective ways to ensure only known-good die are integrated into packages, because the price of failure is significantly higher than with a single die. Better methods for inspecting and testing these devices are already starting to roll out. High-throughput infrared inspection is capable of catching more sub-surface d... » read more

Chip Industry Week In Review
By The SE Staff - 14 Mar, 2025 - Comments: 0

ASML and imec signed a five-year strategic partnership to advance semiconductor innovation and sustainable technology. The collaboration will leverage ASML’s full product portfolio, including high-NA EUV, DUV immersion, and advanced metrology tools, within imec’s pilot line for sub-2nm R&D. Supported by EU and national funding, it will also drive research in silicon photonics, memory, a... » read more

Silicon Photonics Raises New Test Challenges
By Jeorge Hurtarte - 11 Mar, 2025 - Comments: 0

Semiconductor devices continuously experience advancements leading to technology and innovation leaps, such as we see today for applications in AI high-performance computing for data centers, edge AI devices, electric vehicles, autonomous driving, mobile phones, and others. Recent technology innovations include Angstrom-scale semiconductor processing nodes, high-bandwidth memory, advanced 2.5D/... » read more

Failure To Launch
By Gregory Haley - 11 Mar, 2025 - Comments: 1

Failure analysis (FA) is an essential step for achieving sufficient yield in semiconductor manufacturing, but it’s struggling to keep pace with smaller dimensions, advanced packaging, and new power delivery architectures. All of these developments make defects harder to find and more expensive to fix, which impacts the reliability of chips and systems. Traditional failure analysis techniqu... » read more

Chip Industry Week In Review
By The SE Staff - 07 Mar, 2025 - Comments: 0

The Malaysian government signed a deal with Arm to kickstart a chip design ecosystem. Until now, Malaysia has focused on packaging and test. Adding chip design represents a major change in focus. The country will pay SoftBank $250 million over 10 years for Arm’s chip design IP and train 10,000 engineers. Global chip sales reached $56 billion in January, up nearly 18% from the same period i... » read more

Chip Industry Technical Paper Roundup: Mar. 4
By Linda Christensen - 04 Mar, 2025 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=410 /] Find more semiconductor research papers here. » read more

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