tag: test

Making Sure A Heterogeneous Design Will Work
By Ed Sperling - 03 Dec, 2018 - Comments: 0

An explosion of various types of processors and localized memories on a chip or in a package is making it much more difficult to verify and test these devices, and to sign off with confidence. In addition to timing and clock domain crossing issues, which are becoming much more difficult to deal with in complex chips, some of the new devices are including AI, machine learning or deep learning... » read more

System-Level Testing – The New Paradigm for Semiconductor Quality Control
By Astronics - 05 Nov, 2018 - Comments: 0

Covering the history and trends of system-level test for semiconductors, this solution brief discusses: The increasing complexities of testing advanced semiconductor integrated devices across a span of applications: automotive, mobile computing, wearables, and more; Semiconductor trends driving necessary shifts in testing methodologies including SiP, SoC, 3D finFETs, heterogeneous compo... » read more

Speedier, More Accurate Testing of Automotive Sensors Is Here
By Advantest - 12 Oct, 2018 - Comments: 0

The amount of electronic content in automobiles continues to grow at a brisk pace, and sensors represent a significant percentage of cars’ electronics. MarketsandMarkets estimates that the automotive sensors market alone will reach US$36.42 billion in value by 2023, at a compound annual growth rate (CAGR) of 6.7 percent between 2017 and 2023. Sensors in cars are used to monitor and control... » read more

Boosting Regression Throughput By Reusing Setup Phase Simulation
By Mentor, a Siemens Business - 10 Oct, 2018 - Comments: 0

This paper discusses how to write a design so the common initial setup phase simulation is done once and then used as a foundation to run different tests later on, including the ability to change test stimulus to simulate different test behaviors. It also discusses what type of designs are appropriate for this methodology and what a designer can do to make his/her design suitable for it. Also c... » read more

What is STS Software Bundle?
By NI - 08 Oct, 2018 - Comments: 0

The STS Software Bundle provides all the software tools and hardware drivers you need to efficiently develop and deploy test programs, interactively debug, and maintain and calibrate the NI Semiconductor Test System (STS). NI will release new bundles regularly to incorporate new functionality and hardware drivers. The STS Software Bundle includes tools for interactive measurements and debugg... » read more

Why Test Costs Will Increase
By Ed Sperling - 08 Oct, 2018 - Comments: 0

The economics of test are under siege. Long seen as a necessary but rather mundane step in ensuring chip quality, or a way of testing circuitry from the inside while it is still in use, manufacturers and design teams have paid little attention to this part of the design-through-manufacturing flow. But problems have been building for some time in three separate areas, and they could have a b... » read more

Improving In-System Test With Tessent VersaPoint Test Point Technology
By Mentor, a Siemens Business - 08 Oct, 2018 - Comments: 0

This paper describes a new versatile test point technology called VersaPoint, which has been developed specifically to work with designs implementing mixed EDT/LBIST methodologies to reduce EDT pattern counts and improve Logic BIST (LBIST) test coverage. VersaPoint test points can reduce compressed pattern counts 2X to 4X beyond compression alone and improve LBIST test coverage beyond what is p... » read more

So Many Waivers Hiding Issues
By Brian Bailey - 05 Oct, 2018 - Comments: 0

Semiconductor Engineering sat down to discuss problems associated with domain crossings with Alex Gnusin, design verification technologist for Aldec; Pete Hardee, director, product management for Cadence; Joe Hupcey, product manager and verification product technologist for Mentor, a Siemens Business; Sven Beyer, product manager design verification for OneSpin; and Godwin Maben, applications en... » read more

Autonomous Vehicles: IC Design Flow Walk Through
By Andrew Macleod - 04 Oct, 2018 - Comments: 0

Automotive applications, particularly those related to AI and computer vision, are a significant driver of the current semiconductor boom. Established companies are mostly thriving, it’s true, but perhaps more interesting are all the new faces in the game. As usual, Mentor CEO Wally Rhines is one of the great sense-makers of the all this activity. Wally has been making the rounds at variou... » read more

Domain Crossing Nightmares
By Brian Bailey - 27 Sep, 2018 - Comments: 1

Semiconductor Engineering sat down to discuss problems associated with domain crossings with Alex Gnusin, design verification technologist for Aldec; Pete Hardee, director, product management for Cadence; Joe Hupcey, product manager and verification product technologist for Mentor, a Siemens Business; Sven Beyer, product manager design verification for OneSpin; and Godwin Maben, applications en... » read more

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