tag: Tilera

Taming Concurrency
By Brian Bailey - 17 Jan, 2019 - Comments: 2

Concurrency adds complexity for which the industry lacks appropriate tools, and the problem has grown to the point where errors can creep into designs with no easy or consistent way to detect them. In the past, when chips were essentially a single pipeline, this wasn't a problem. In fact, the early pioneers of EDA created a suitable language to describe and contain the necessary concurrency ... » read more

The Impact of Moore’s Law Ending
By Brian Bailey - 29 Oct, 2018 - Comments: 2

Over the past couple of process nodes the chip industry has come to grips with the fact that Moore's Law is slowing down or ending for many market segments. What isn't clear is what comes next, because even if chipmakers stay at older nodes they will face a series of new challenges that will drive up costs and increase design complexity. Chip design has faced a number of hurdles just to get ... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 03 Jul, 2014 - Comments: 0

Looking to address a new wave of chip architectures in the marketplace, Applied Materials has rolled out its next-generation, medium-current ion implanter. The system, dubbed the VIISta 900 3D, is geared for the production of finFETs and 3D NAND designs at the sub-2xnm nodes. Typically, medium-current implanters have a maximum energy range of about 900keV (triple-charge), with dose ranges fr... » read more

Low Power Drives New Architectures
By Ed Sperling - 08 Sep, 2011 - Comments: 0

By Pallab Chatterjee Power became the driving discussion at several major events last month. The global cries for energy reduction, which have been mainstream since the early 1970s on the political level, have now moved to being real economic realities for component and systems suppliers. Chipmakers are finding that lower power makes good economic sense—lower cost of packaging, lower cost... » read more

Performance Plus Lower Power
By Ed Sperling - 07 Oct, 2010 - Comments: 0

By Pallab Chatterjee Power and performance often have been seen as something of a tradeoff. Chipmakers focus on one or the other, or they extract a little improvement in both at each new process node. That way of thinking is changing, though. At the recent Linley processor conference, the central theme for both standalone and embedded processors was that architectures have to optimized for ... » read more

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy