Plugging Holes In Machine Learning

By Ed Sperling - 19 Sep, 2016 - Comments: 0

The number of companies using machine learning is accelerating, but so far there are no tools to validate, verify and debug these systems. That presents a problem for the chipmakers and systems companies that increasingly rely on machine learning to optimize their technology because, at least for now, it creates the potential for errors that are extremely difficult to trace and fix. At the s... » read more

What’s Missing From Machine Learning

By Ed Sperling - 01 Sep, 2016 - Comments: 1

Machine learning is everywhere. It's being used to optimize complex chips, balance power and performance inside of data centers, program robots, and to keep expensive electronics updated and operating. What's less obvious, though, is there are no commercially available tools to validate, verify and debug these systems once machines evolve beyond the final specification. The expectation is th... » read more

Focus Shifting To Photonics

By Ed Sperling - 17 Aug, 2016 - Comments: 4

Silicon photonics finally appears ready for prime time, after years of unfulfilled expectations and a vision that stretches back at least a couple decades. The biggest challenge has been the ability to build a light source directly into the silicon process, rather than trying to add one onto a chip after manufacturing. [getentity id="22846" e_name="Intel"] today said it has achieved that mi... » read more

Will Open-Source Work For Chips?

By Brian Bailey - 30 Jun, 2016 - Comments: 2

Open source is getting a second look by the semiconductor industry, driven by the high cost of design at complex nodes along with fragmentation in end markets, which increasingly means that one size or approach no longer fits all. The open source movement, as we know it today, started in the 1980s with the launch of the GNU project, which was about the time the electronic design automation (... » read more

Battle Looms Over Mobile Payments

By Ernest Worthman - 03 Mar, 2016 - Comments: 0

The lines are drawn. The sides are sizing each other up. Apple is on one side with secure element, and Google and Microsoft are on the other side with host card emulation. Both are mobile payment systems for smartphones that rely on near-field communication technology. Apple fired the first shot with SE, and Google soon replied with HCE. And now both sides are ramping up after months of dela... » read more

Why Packaging Matters

By Ed Sperling - 19 Nov, 2015 - Comments: 1

The semiconductor package is changing. What was until very recently considered an afterthought is now becoming a key part of the design process at all major chipmakers, and a critical factor in the extension of Moore's Law. This is a sharp reversal of what was almost universally an afterthought in planar silicon design and manufacturing. Rarely was the package an integral part of the archite... » read more

New Metrics For The Cloud

By Ed Sperling - 10 Sep, 2015 - Comments: 0

Data centers are beginning to adjust their definition of what makes one server better than another. Rather than comparing benchmarked performance of general-purpose servers, they are adding a new level of granularity based upon what kind of chips work best for certain operations or applications. Those decisions increasingly include everything from the level of redundancy in compute operations, ... » read more

Fallback Plans

By Ed Sperling - 26 Jun, 2012 - Comments: 0

By Ann Steffora Mutschler With EUV lithography missing a few deadlines already, the semiconductor industry has begun to search for alternatives. None of these solutions is simple, of course, and it’s questionable whether they’re even economically viable. And even if EUV is ready for mass production by 14nm, there are new challenges that have to be dealt with—particularly in the space... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

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