End-User Report: Interoperability Still Lacking With System-Level Power Modeling

By Ann Mutschler - 27 Aug, 2009 - Comments: 0

All of the major EDA vendors and standards groups are pitching modeling as the next level of abstraction for advanced process nodes, but is it working as planned for the chipmakers? System-Level Design caught up with Frans Theeuwen, Department Manager for System Design at NXP Semiconductors Corp. to discuss system-level design and power modeling. By Ann Steffora Mutschler SLD: How long has N... » read more

Experts At The Table: Platform-Based Design

By Ed Sperling - 16 Apr, 2009 - Comments: 0

By Ed Sperling System-Level Design sat down with Simon Bloch, vice president and general manager of ESL/HDL Design and Synthesis at Mentor Graphics; Mike Gianfagna, vice president of marketing at Atrenta; and Jim Hogan, a private investor. What follows are excerpts of a lively, often contentious two-hour conversation. SLD: What’s the starting point for designs in this world? Hogan: I... » read more

Exploring The Use Of Virtual Platforms At The Electronic System Level

By Cheryl Ajluni - 27 Mar, 2009 - Comments: 0

By Cheryl Ajluni System design is hard. That should not come as a surprise to anyone these days. With design geometries shrinking and device complexity on the rise, this fact is not likely to change anytime soon. One concept for easing that burden for system-level designers is the virtual platform. Granted, the concept itself is nothing new, but today it is being employed in ever more creativ... » read more

Verifying Low-Power IP And Designs

By Ed Sperling - 13 Mar, 2009 - Comments: 0

By Ed Sperling Verification has always been the time-consuming part of designs. Even at 120nm and above, where power wasn’t much of an issue, verification accounted for an estimated 70 percent of the non-recurring engineering expense in a chip. Since then, the tools to automate design have become more effective, but the complexity of designs has grown by leaps and bounds beyond those tools.... » read more

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tag: TLM

End-User Report: Interoperability Still Lacking With System-Level Power Modeling

Experts At The Table: Platform-Based Design

Exploring The Use Of Virtual Platforms At The Electronic System Level

Verifying Low-Power IP And Designs

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