tag: Tokyo Electron

Blog Review: Aug. 23
By Jesse Allen - 23 Aug, 2023 - Comments: 0

Siemens' Stephen Chavez discusses best practices when it comes to thermal analysis for PCB design, including component placement and close collaboration between mechanical and electrical engineering disciplines. Synopsys' Gary Ruggles, Richard Solomon, and Varun Agrawal introduce the Compute Express Link (CXL) specification and how it could help improve latency through computational offloadi... » read more

Devices And Transistors For The Next 75 Years
By Laura Peters - 16 Feb, 2023 - Comments: 0

The 75th anniversary of the invention of the transistor sparked a lively panel discussion at IEDM, spurring debate about the future of CMOS, the role of III-V and 2D materials in future transistors, and what will be the next great memory architecture.[1] Industry veterans from the memory, logic, and research communities see high-NA EUV production, NAND flash with 1,000 layers, and hybrid bon... » read more

Where All The Semiconductor Investments Are Going
By Ed Sperling - 17 Nov, 2022 - Comments: 2

Companies and countries are funneling huge sums of money into semiconductor manufacturing, materials, and research — at least a half-trillion dollars over the next decade, and maybe much more — to guarantee a steady supply of chips and know-how to support growth across a wide swath of increasingly data-centric industries. The build-out of a duplicate supply chain that can guarantee capac... » read more

Metal Oxide Resist (MOR) EUV Lithography Processes For DRAM Application
By TEL - 19 Oct, 2022 - Comments: 0

This paper reports the readiness of key EUV resist process technologies using Metal Oxide Resist (MOR) aiming for the DRAM application. For MOR, metal contamination reduction and CD uniformity (CDU) are the key performance requirements expected concerning post exposure bake (PEB). Based on years of experience with spin-on type Inpria MOR, we have designed a new PEB oven to achieve contamination... » read more

Week In Review: Manufacturing, Test
By Karen Heyman - 12 Aug, 2022 - Comments: 0

Government funding President Biden signed the CHIPS and Science Act into law on Tuesday, saying “America is back and leading the way.” That same day Micron touted a $40 billion investment through to 2030, which it expects will create 40,000 American jobs. “This legislation will enable Micron to grow domestic production of memory from less than 2% to up to 10% of the global market in t... » read more

Hybrid Bonding Moves Into The Fast Lane
By Laura Peters - 21 Jul, 2022 - Comments: 1

The industry’s unquenchable thirst for I/O density and faster connections between chips, particularly logic and cache memory, is transforming system designs to include 3D architectures, and hybrid bonding has become an essential component in that equation. Hybrid bonding involves die-to-wafer or wafer-to-wafer connection of copper pads that carry power and signals and the surrounding diele... » read more

Week In Review, Manufacturing, Test
By Susan Rambo - 08 Jul, 2022 - Comments: 0

The U.S. is attempting to restrict sales of ASML’s deep ultra-violet (DUV) litho systems to China, according to a report from Bloomberg. The U.S. has been working to limit China's access to advanced technology for some time, and it has already limited sales of extreme ultra-violet (EUV), which is used to develop chips at the most advanced process nodes. DUV, in contrast, is used for older-nod... » read more

Week In Review: Manufacturing, Test
By Karen Heyman - 24 Jun, 2022 - Comments: 0

Notes from the fabs Intel warned the “scope and pace" of the Ohio fab buildout could be impacted due to U.S. Congress’ inaction on funding the $52 billion CHIPS Act. The facility was announced in January with an initial phase investment of more than $20 billion with a larger expansion up to $100 billion over the next decade. The initial phase is not expected to be impacted, other than a de... » read more

High-NA EUV May Be Closer Than It Appears
By Katherine Derbyshire - 16 Jun, 2022 - Comments: 1

High-NA EUV is on track to enable scaling down to the Angstrom level, setting the stage for chips with even higher transistor counts and a whole new wave of tools, materials, and system architectures. At the recent SPIE Advanced Lithography conference, Mark Phillips, director of lithography hardware and solutions at Intel, reiterated the company’s intention to deploy the technology in high... » read more

Week in Review: Manufacturing, Test
By Linda Christensen - 10 Jun, 2022 - Comments: 0

Breaking the Logjam The U.S. government’s delay in funding strategic chip capacity is threatening supply chains that are critical to national security. In fact, classified meetings are being held this week on the subject. Meanwhile, recognizing that time is of the essence, a group of billionaires has backed the “America’s Frontier Fund,” a non-profit group that aims to spur U.S. chipma... » read more

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