Airbus A320 Recall: Rethinking Fault Testing In Aerospace


Fault injection is usually discussed in the context of security, where adversaries deliberately induce faults to bypass protections or extract sensitive information. In safety engineering, by contrast, faults are often treated as rare, random events driven by natural or environmental factors. The recent Airbus A320 recall is a good example of how a primarily safety incident can still benefit fr... » read more

Low-Latency Interconnect for Close-Coupled On-Chip Communication With Error Correction Code Protection (ETH Zurich)


A new technical paper titled "relOBI: A Reliable Low-latency Interconnect for Tightly-Coupled On-chip Communication" was published by researchers at ETH Zurich. Excerpt "On-chip communication is a critical element of modern systems-on-chip (SoCs), allowing processor cores to interact with memory and peripherals. Interconnects require special care in radiation-heavy environments, as any soft... » read more

In-Memory Computing: Techniques for Error Detection and Correction


A new technical paper titled "Error Detection and Correction Codes for Safe In-Memory Computations" was published by researchers at Robert Bosch, Forschungszentrum Julich, and Newcastle University. Abstract "In-Memory Computing (IMC) introduces a new paradigm of computation that offers high efficiency in terms of latency and power consumption for AI accelerators. However, the non-idealities... » read more

Targeting Redundancy In ICs


Technology developed for one purpose is often applicable to other areas, but organizational silos can get in the way of capitalizing on it until there is a clear cost advantage. Consider memory. All memories are fabricated with spare rows and columns that are swapped in when a device fails manufacturing test. "This is a common method to increase the yield of a device, based on how much memor... » read more

Whatever Happened To HLS?


A few years ago, [getkc id="105" comment="high-level synthesis"] (HLS) was probably the most talked about emerging technology that was to be the heart of a new [getkc id="48" kc_name="Electronic System Level"] (ESL) flow. Today, we hear much less about the progress being made in this area. Semiconductor Engineering sat down to discuss this with Bryan Bowyer, director of engineering for high-lev... » read more

Achieve Functional Safety And High Uptime Using TMR


A look at how to build reliable FPGA-based designs, employing triple modular redundancy. To read more, click here. » read more