Five Tips To Avoid Security Errors In Product Development


Riscure, now part of Keysight, has been helping chip vendors and device manufacturers improve the security of their products for years. The security scenario has changed a lot over time. The attacker profile evolved from individuals motivated by curiosity, with very limited resources and attack potential, to well-funded and organized adversaries with malicious motivations and the capacity to ex... » read more

TEE.fail: When Your Security System Leaves the Window Open


Let’s talk about a cybersecurity attack that’s been making waves: TEE.fail. TEE stands for Trusted Execution Environment. Sounds reassuring, right? But here’s the kicker: exactly what a TEE is, and what it’s supposed to guarantee, is surprisingly unclear. TEEs have been around for about a decade, but as with many things in security, the rules are more like guidelines. You might think, �... » read more

Private Delegated Computations Using Strong Isolation


Computations are now routinely delegated to third-parties. In response, Confidential Computing technologies are being added to microprocessors offering a trusted execution environment (TEE) that provides confidentiality and integrity guarantees to code and data hosted within—even in the face of a privileged attacker. TEEs, along with an attestation protocol, permit remote third-parties to est... » read more

Hardware-Based Confidential Computing (NIST)


NIST has published a draft report, titled “Hardware Enabled Security: Hardware-Based Confidential Computing,” which presents an approach for managing machine identities for protection against malware and other security vulnerabilities. Comments are due April 10, 2023. Abstract "Organizations employ a growing volume of machine identities, often numbering in the thousands or millions per ... » read more

Side-Channel Attacks Via Cache On the RISC-V Processor Configuration


A technical paper titled "A cross-process Spectre attack via cache on RISC-V processor with trusted execution environment" was published by researchers at University of Electro-Communication, Academy of Cryptography Techniques, Technology Research Association of Secure IoT Edge Application based on RISC-V Open Architecture (TRASIO), and AIST. "This work proposed a cross-process exploitation ... » read more

HW-Enabled Security Techniques To Improve Platform Security And Data Protection For Cloud Data Centers And Edge Computing (NIST)


A technical paper titled "Hardware-Enabled Security: Enabling a Layered Approach to Platform Security for Cloud and Edge Computing Use Cases" was published by NIST, Intel, AMD, Arm, IBM, Cisco and Scarfone Cybersecurity. Abstract: "In today’s cloud data centers and edge computing, attack surfaces have shifted and, in some cases, significantly increased. At the same time, hacking has becom... » read more

Performance Implications for Multi-Core RISC-V Systems with Dedicated Security Hardware


Abstract "The RISC-V instruction set architecture (ISA) is a promising open-source architecture supporting the Open Era of Computing. As RISC-V matures, consumers, industry leaders, and nation states are looking at the potential benefits RISC-V offers –especially for secure systems which may require privileged architecture implementations, physical memory protection (PMP), or trusted executi... » read more

Cybersecurity For Cars Starts With Chips And IP


The automotive industry is undergoing a significant transformation. Cars are becoming more sophisticated and valuable with increased connectivity and capabilities to provide a better user experience. They are also collecting and transmitting more and more sensitive data and thus are becoming very attractive targets for attacks. Cybercrime in the automotive industry is growing rapidly. How bad i... » read more

AI/ML Workloads Need Extra Security


The need for security is pervading all electronic systems. But given the growth in data-center machine-learning computing, which deals with extremely valuable data, some companies are paying particular attention to handling that data securely. All of the usual data-center security solutions must be brought to bear, but extra effort is needed to ensure that models and data sets are protected ... » read more

Isolate Security-Critical Applications On Zynq UltraScale+ Device


Implementing a TEE on the Zynq UltraScale+ platform (RFSoCs and MPSoCs) greatly reduces the attack surface of security-critical applications. Explore this white paper to find out • What a TEE is • How the requirements for a TEE are easily met on the Zynq UltraScale+ platform • Why a TEE is needed, even if hypervisors are used • An example architecture of Prove & Run’s Proven... » read more

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