A Hierarchical Instruction Cache Tailored To Ultra-Low-Power Tightly-Coupled Processor Clusters


A technical paper titled “Scalable Hierarchical Instruction Cache for Ultra-Low-Power Processors Clusters” was published by researchers at University of Bologna, ETH Zurich, and GreenWaves Technologies. Abstract: "High Performance and Energy Efficiency are critical requirements for Internet of Things (IoT) end-nodes. Exploiting tightly-coupled clusters of programmable processors (CMPs) ha... » read more

A RISC-V ISA Extension For Ultra-Low Power IoT Wireless Signal Processing


This work presents an instruction-set extension to the open-source RISC-V ISA (RV32IM) dedicated to ultra-low power (ULP) software-defined wireless IoT transceivers. The custom instructions are tailored to the needs of 8/16/32-bit integer complex arithmetic typically required by quadrature modulations. The proposed extension occupies only 2 major opcodes and most instructions are designed to co... » read more

Turning Down The Power


Chip and system designers are giving greater weight to power issues these days. But will they inevitably hit a wall in accounting for ultra-low-power considerations? Performance, power, and area are the traditional attributes in chip design. Area was originally the main priority, with feature sizes constantly shrinking according to Moore's Law. Performance was in the saddle for many years. M... » read more

EEMBC Offers Benchmark for Bluetooth LE in IoT


The Embedded Microprocessor Benchmark Consortium is introducing the IoTMark-BLE benchmark, for certifying the performance of devices using the Bluetooth Low Energy wireless protocol for Internet of Things applications. It is the first in the group’s IoT-Connect benchmark series. EEMBC also is preparing the ULPBench 2.0 standard, which will test the ultra-low-power capabilities of connected... » read more

Cryptography For ULP Devices


Soon virtually everything and everyone will be connected to the IoE in one fashion or another, and much of it will be wireless. To make it all work, these wireless, and low-power devices will need a new paradigm for handling cryptography. Ultra-low power devices have an interesting, and challenging set of metrics. There are, in general, two approaches that can work, with a variety of sub-sce... » read more

IP Integration Challenges Increase


Semiconductor Engineering sat down with Chris Rowen, CTO of [getentity id="22032" e_name="Cadence"]'s IP group; Rob Aitken, an [getentity id="22186" comment="ARM"] fellow; Patrick Soheili, vice president of product management and corporate development at [getentity id="22242" e_name="eSilicon"]; Navraj Nandra, senior director of marketing for DesignWare analog and mixed-signal IP at [getentity ... » read more