RISC-V At Embedded World

By Jo Windel - 28 Mar, 2019 - Comments: 0

As we arrive back from a busy, and unusually warm, Embedded World 2019 and recall the many interesting discussions we had over the three-day show, one thing is most certainly clear: This is the Mobile World Congress (MWC) event for Nuremberg. Its many halls were jam-packed with technology from a wide variety of sectors but also with an array of application focal points. There was everything ... » read more

Data-Driven Verification Begins

By Ed Sperling - 27 Mar, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss data-driven verification with Yoshi Watanabe, senior software architect at Cadence; Hanan Moller, systems architect at UltraSoC; Mark Conklin, principal verification engineer at Arm; and Hao Chen, senior design engineer at Intel. What follows are excerpts of that conversation, which was conducted in front of a live audience at DVCon. (L-R) Yosh... » read more

Domain Expertise Becoming Essential For Analytics

By Ed Sperling - 12 Mar, 2019 - Comments: 0

Sensors are being added into everything, from end devices to the equipment used to make those sensors, but the data being generated has limited or no value unless it's accompanied by domain expertise. There are two main problems. One is how and where to process the vast amount of data being generated. Chip and system architectures are being revamped to pre-process more of that data closer to... » read more

Next Wave Of Security For IIoT

By Kevin Fogarty and Ed Sperling - 07 Mar, 2019 - Comments: 0

A rush of new products and services promise to make the famously un-secured Industrial IoT (IIoT) substantially more secure in the near future. Although the semiconductor industry has been churning out a variety of security-related products and concepts, ranging from root of trust approaches to crypto processors and physically unclonable functions, most IIoT operations have been slow to adop... » read more

The Other Side Of Makimoto’s Wave

By Ann Mutschler - 06 Mar, 2019 - Comments: 0

Custom hardware is undergoing a huge resurgence across a variety of new applications, pushing the semiconductor industry to the other side of Makimoto's Wave. Tsugio Makimoto, the technologist who identified the chip industry’s 10-year cyclical swings between standardization and customization, predicted there always will be room in ASICs for general-purpose processors. But it's becoming mo... » read more

New Design Approaches At 7/5nm

By Ed Sperling - 04 Mar, 2019 - Comments: 0

The race to build chips with a multitude of different processing elements and memories is making it more difficult to design, verify and test these devices, particularly when AI and leading-edge manufacturing processes are involved. There are two fundamental problems. First, there are much tighter tolerances for all of the components in those designs due to proximity effects. Second, as a re... » read more

The Problem With Post-Silicon Debug

By Ann Mutschler - 28 Feb, 2019 - Comments: 0

Semiconductor engineers traditionally have focused on trying to create 'perfect' GDSII at tape-out, but factors such as hardware-software interactions, increasingly heterogeneous designs, and the introduction of AI are forcing companies to rethink that approach. In the past, chipmakers typically banked on longer product cycles and multiple iterations of silicon to identify problems. This no ... » read more

The Rapid Rise Of RISC-V

By Andy Gothard - 28 Feb, 2019 - Comments: 0

The first RISC-V Summit, which took place last month in Santa Clara, CA, appears to be a watershed for the RISC-V ecosystem. The technology is maturing and the ecosystem is growing fast – and that was reflected in the nature of the presentations and news announcements we saw. The accent has started to move to how the technology will be used in real life. UltraSoC’s announcement of a har... » read more

Week In Review: Design, Low Power

By Jesse Allen - 22 Feb, 2019 - Comments: 0

Tools OneSpin unveiled a set of formal apps for development and assessment of RISC-V cores. The RISC-V Integrity Verification Solution formalizes the RISC-V ISA in a set of SystemVerilog Assertions to verify compliance for the ISA is met. It provides a formal bug absence core assessment environment for unbounded proofs and systematic discovery of all hidden instructions or unintended side effe... » read more

Using Sensor Data To Improve Yield And Uptime

By Ed Sperling - 21 Feb, 2019 - Comments: 2

Semiconductor equipment vendors are starting to add more sensors into their tools in an effort to improve fab uptime and wafer yield, and to reduce cost of ownership and chip failures. Massive amounts of data gleaned from those tools is expected to provide far more detail than in the past about multiple types and sources of variation, including when and where that variation occurred and how,... » read more

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Knowledge Centers
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