What’s Next For High Bandwidth Memory


A surge in data is driving the need for new IC package types with more and faster memory in high-end systems. But there are a multitude of challenges on the memory, packaging and other fronts. In systems, for example, data moves back and forth between the processor and DRAM, which is the main memory for most chips. But at times this exchange causes latency and power consumption, sometimes re... » read more

Week In Review: Manufacturing, Test


Chipmakers and OEMs TrendForce has released its projected foundry rankings for the fourth quarter of 2019. TSMC remains in first place, followed by Samsung, GlobalFoundries and UMC, according to the firm. “TrendForce projects the foundry industry’s 4Q19 revenue performance to exceed previous expectations,” according to the firm. “Nonetheless, the ongoing U.S-China trade war and uncerta... » read more

Week In Review: Manufacturing, Test


Chipmakers United Microelectronics Corp. (UMC) has announced the readiness of its new 22nm process. The process enables new 22nm designs or allows customers to migrate from 28nm to 22nm. UMC’s 22nm maintains its existing 28nm design architectures. UMC's 22nm process features a 10% area reduction, better power-to-performance ratio and enhanced RF capabilities, compared to the company’s 2... » read more

Week In Review: Manufacturing, Test


Chipmakers For some time, Intel has experienced supply constraints and shortages for its 14nm chip products. Apparently, the company is still having issues with both 14nm and 10nm. “Despite our best efforts, we have not yet resolved this challenge,” according to a statement from Michelle Johnston Holthaus, executive vice president and general manager of the Sales, Marketing and Communicati... » read more

Week In Review: Design, Low Power


Accellera formed the Universal Verification Methodology Analog/Mixed-Signal Working Group (UVM-AMS WG), which will work to develop a standard that will provide a unified analog/mixed-signal verification methodology based on UVM to improve the verification of AMS integrated circuits and systems. “Our objective is to standardize a method to drive and monitor analog/mixed-signal nets within UVM,... » read more

DRAM Scaling Challenges Grow


DRAM makers are pushing into the next phase of scaling, but they are facing several challenges as the memory technology approaches its physical limit. DRAM is used for main memory in systems, and today’s most advanced devices are based on roughly 18nm to 15nm processes. The physical limit for DRAM is somewhere around 10nm. There are efforts in R&D to extend the technology, and ultimate... » read more

Planning For Panel-Level Fan-out


Several companies are developing or ramping up panel-level fan-out packaging as a way to reduce the cost of advanced packaging. Wafer-level fan-out is one of several advanced packaging types where a package can incorporate dies, MEMS and passives in an IC package. This approach has been in production for years, and is produced in a round wafer format in 200mm or 300mm wafer sizes. Fan-out... » read more

Week In Review: Manufacturing, Test


Chipmakers China has created a new $29 billion fund to help advance its semiconductor sector, according to reports from Bloomberg and others. Here's another report. The The U.S. and China are in the midst of a trade war. This has prompted China to accelerate its efforts to become more self-sufficient in semiconductor design and production. This includes DRAMs as well as logic/foundry. -----... » read more

Power Semi Wars Begin


Several vendors are rolling out the next wave of power semiconductors based on gallium nitride (GaN) and silicon carbide (SiC), setting the stage for a showdown against traditional silicon-based devices in the market. Power semiconductors are specialized transistors that incorporate different and competitive technologies like GaN, SiC and silicon. Power semis operate as a switch in high-volt... » read more

What’s The Best Advanced Packaging Option?


As traditional chip designs become more unwieldy and expensive at each node, many IC vendors are exploring or pursuing alternative approaches using advanced packaging. The problem is there are too many advanced packaging options on the table already, and the list continues to grow. Moreover, each option has several tradeoffs and challenges, and all of them are still relatively expensive. ... » read more

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