Week In Review: Design, Low Power

Semi M&A strong in 2019; Qorvo buys Decawave; Presto buys Delta.


Presto Engineering, an outsourced operations provider to semiconductor and IoT device manufacturers, acquired the DELTA Microelectronics business unit of FORCE Technology. The acquisition adds DELTA’s ASIC design and manufacturing to its portfolio. The two companies will retain a strong relationship: FORCE Technology has become a shareholder of Presto Engineering and Juan Farré, FORCE’s CTO, has joined the company’s Supervisory Board. DELTA merged with FORCE in 2016. The company was founded in 1941 in Denmark. Terms of the deal were not disclosed.

Qorvo will acquire IR-UWB supplier Decawave for $400 million. Based in Dublin, Ireland, Decawave develops ultra-wideband (UWB) technologies for ultra-accurate local area micro-location services. The company was founded in 2007. Qorvo is a major supplier of RF products to Apple.

In other M&A news, IC Insights reports that 2019 was the third-highest M&A year by value for the semiconductor industry, following 2015 and 2016. Last year saw combined acquisition value of $31.7 billion, which was a 22% increase from $25.9 billion in 2018. The market research firm cautiously notes that total acquisitions in the $25-30 billion range per year may be the new normal for the industry.

Deals & Certifications
SiEngine licensed Arteris IP’s FlexNoC interconnect and the accompanying FlexNoC Resilience Package for use as the on-chip dataflow backbone of its next-generation automotive SoC targeted at automobile digital cockpit, navigation and infotainment systems. SiEngine cited the IP’s integrated functional safety mechanisms and its ability to reduce on-chip routing congestion and increase performance.

Amazon licensed Fraunhofer IIS’ MPEG-H audio decoder software for the new Echo Studio. MPEG-H will enable Sony 360 Reality Audio format services on Amazon Music HD, which aims to provide three-dimensional sound.

UMC certified its 14nm process on Mentor’s Calibre Eco Fill tape-out flow utility. The flow utilizes ECO layout comparison, conflict dummy shape removal, and dummy refill. The Calibre Eco Fill process flow uses UMC’s 14nm FinFET Compact Process dummy fill design rule that also supports dummy fill when the design layout changes.

Check out upcoming industry events and conferences: FPGA 2020 will be held Feb. 23-25 in Seaside, CA, and includes sessions on deep learning, architectures, tools, and security. DVCon is Mar. 2-5 in San Jose, CA; key topics include formal verification, Portable Stimulus, IP security, intelligent system design, AI and ML-focused verification, 5G verification, UVM strategies, power-aware design and hybrid verification. Plus, nominations for the Marie R. Pistilli Women in EDA award are open; DAC will be co-located with SEMICon West July 19-23, 2020 in San Francisco, CA.

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