Chip Industry Week In Review


JEDEC and the Open Compute Project rolled out a new set of guidelines for standardizing chiplet characterization details, such as thermal properties, physical and mechanical requirements, and behavior specs. Those details have been a sticking point for commercial chiplets, because without them it's not possible to choose the best chiplet for a particular application or workload. The guidelines ... » read more

Veterans Could Close The Semi Industry’s Workforce Gap


Veterans are beginning to form a valuable talent pool for advanced manufacturing and chip-sector positions, helping to fill the current and projected future gap in qualified workers as new fabs come online, and adding discipline and skills that are difficult to find otherwise. The job opportunities are many, and so are the possible job paths. In some cases, veterans are looking to make a qui... » read more

Chip Industry Week In Review


By Jesse Allen, Karen Heyman, and Liz Allan More than 1 billion generative AI smartphones are expected be shipped during 2024 to 2027, reports Counterpoint. The share of GenAI smartphones will be 4% of the market in 2023 and is likely to double in 2024, with Samsung capturing half the market, followed by Chinese OEMs. By 2027, GenAI smartphones could account for 40% of the market. Global ... » read more

Chiplets: Deep Dive Into Designing, Manufacturing, And Testing


Chiplets are a disruptive technology. They change the way chips are designed, manufactured, tested, packaged, as well as the underlying business relationships and fundamentals. But they also open the door to vast new opportunities for existing chipmakers and startups to create highly customized components and systems for specific use cases and market segments. This LEGO-like approach sounds ... » read more

Week In Review: Design, Low Power


Qualcomm, NXP, Infineon, Nordic, and Bosch are jointly investing in a new RISC-V company, to be formed in Germany, that will speed up RISC-V’s adoption in commercial products. The company will be “a single source to enable compatible RISC-V based products, provide reference architectures, and help establish solutions widely used in the industry,” according to a press release. The co... » read more

SiPs: The Best Things in Small Packages


System-in-package (SiP) is quickly emerging as the package option of choice for a growing number of applications and markets, setting off a frenzy of activity around new materials, methodologies, and processes. SiP is an essential packaging platform that integrates multiple functionalities onto a single substrate, which enables lower system cost, design flexibility, and superior electrical p... » read more

Week In Review: Design, Low Power


AMD completed its acquisition of Xilinx. The all-stock deal ended up being valued at approximately $50 billion due to a rise in AMD's share price (the deal was valued at $35 billion when announced). The Xilinx business will become the newly formed Adaptive and Embedded Computing Group (AECG), led by former Xilinx CEO Victor Peng, and will continue its FPGA, adaptive SoC, and software roadmaps a... » read more

Week In Review: Manufacturing, Test


Packaging Amkor plans to build a packaging plant in Bac Ninh, Vietnam. The first phase of the new factory will focus on providing system-in-package (SiP) assembly and test services for customers. The investment for the first phase of the facility is estimated to be between $200 million and $250 million. “This is a strategic, long-term investment in geographical diversification and factory... » read more

Manufacturing Bits: Oct. 26


GaN finFETs, scaling GaN At the upcoming IEEE International Electron Devices Meeting (IEDM) in San Francisco, a slew of entities will present papers on the latest technologies in R&D. The event, to be held Dec. 11–15, involve papers on advanced packaging, CMOS image sensors, interconnects, transistors, power devices and other technologies. At IEDM, Intel will present a paper on a GaN-... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive SGS-TÜV Saar certified that Cadence’s Tensilica Xtensa processors with FlexLock meets the ISO 26262:2018 standard to ASIL-D level. The new FlexLock feature is key to the certification because it supports lockstep, a fault-tolerant method that runs the same operation on two cores at the same time and then compares the output. Any difference in the output can be examined for issues... » read more

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