Week In Review: Design, Low Power

Qualcomm, Infineon, NXP, others invest in new RISC-V consortium; AMD’s plans $400M design center; new processor platform IP; biodegradable PCB substrate; optical PCIe.


QualcommNXPInfineonNordic, and Bosch are jointly investing in a new RISC-V company, to be formed in Germany, that will speed up RISC-V’s adoption in commercial products. The company will be “a single source to enable compatible RISC-V based products, provide reference architectures, and help establish solutions widely used in the industry,” according to a press release. The company’s first focus will be RISC-V in automotive, a market with many safety and security parameters. The open-source ISA presents challenges in proving it adheres to a specification. Later, the company will include mobile and IoT.

AMD plans to invest approximately $400 million in India over the next five years. It will include a new campus in Bangalore that will serve as the company’s largest design center, and about 3,000 new engineering roles by the end of 2028.

Infineon Technologies is turning to a recyclable and biodegradable PCB substrate based on natural fibers and a halogen-free polymer for its demo and evaluation boards. Developed by Jiva Materials, the plant-based PCB material is enclosed in a non-toxic polymer that dissolves when immersed in hot water, leaving only compostable organic material. It also allows the electronic components soldered to the board to be recovered and recycled.

Additionally, Infineon plans to expand its 200mm silicon carbide (SiC) power fab in Kulim, Malaysia, with an investment of up to €5 billion (~$5.5 billion) over five years.

Tenstorrent, which develops RISC-V processor IP, raised $100 million in strategic financing. It focuses on processor cores for the AI and server market, along with AI accelerator PCIe cards.

Find out who else is getting investment in the July startup funding report. Highlights include several other AI hardware companies, along with a notable investment in photonics and a big month for silicon spin-based quantum computers.

Tools, IP, products

Cadence unveiled the Tensilica Xtensa LX8 processor platform to serve as the foundation for new DSP, multi-processor, interconnect, and system-level IP products. Enhancements include L2 cache performance improvements of 50% or more for cache-based subsystems compared to the Xtensa LX7 processor, improved branch prediction, enhanced ARM AMBA interfaces, and expanded interrupt support.

The EDA industry has been talking about shift left for a few years, but development flows are now being stretched in two additional ways, extending right to include silicon lifecycle management, and sideways to include safety and security. In addition, safety and security join verification and power as being vertical concerns.

Renesas Electronics created tool extensions for all of its embedded microcontrollers and microprocessors that support Microsoft Visual Studio Code, enabling design and debug of software in the VS Code IDE.

Mobiveil and Winbond are teaming up on an IP controller for Winbond’s HYPERRAM device, an alternative to pseudo-SRAM that offers speeds of up to 250MHz and densities from 32Mb to 512Mb supporting x8/x16 modes. It targets automotive, smart IoT, industrial, wearables, TWS headsets, smart speakers, and connectivity applications.

Keysight Technologies gained approval for its 5G New Radio (NR) Release 16 (Rel-16) power-saving test cases for demodulation and radio resource management (RRM) in the n78 frequency band. Keysight also built a MIMO over-the-air (OTA) dynamic channel model test and user equipment (UE) performance validation system with China Telecommunication Technology Labs (CTTL) based on CTIA requirements for the 5G NR FR1 frequency band.

VLSI is a term that conjures up images of a college textbook, but some of the concepts included in very large-scale integration remain relevant and continue to evolve, while others have fallen by the wayside.

Hailo added to its AI accelerator lineup, introducing a PCIe card line as well as a version targeted at entry level products requiring limited AI capacity or lower performance.

Qorvo debuted QSPICE, a mixed-mode circuit simulation tool that combines modern schematic capture and fast mixed-mode simulation.

TrendForce looked at the development status of HBM3 and HBM3e at SK Hynix, Samsung, and Micron.


PCI-SIG formed a new workgroup to explore adapting the PCI Express architecture to optical connections. The effort will support a wide range of optical technologies, while potentially developing technology-specific form factors.

JEDEC published a new standard to support Compute Express Link (CXL) memory module implementation. JESD317 CMM defines the specifications of interface parameters, signaling protocols, environmental requirements, packaging, and other features as reference for specific target implementations of CXL-attached memory modules.

Research notes

Researchers from MIT and the Technische Universitat Berlin propose using an optoelectronic processor based on vertical-cavity surface-emitting laser (VCSEL) arrays to create an optical neural network system. They claim the approach provides higher energy efficiency and compute density compared to digital processors.

At the University of Houston, researchers built a prototype of a fully stretchable fabric-based lithium-ion battery. It uses conductive silver fabric as a platform and current collector, which enables the electrical conduction pathways to persist when mechanically deformed or stretched.

Scientists from MIT, IBM Research Europe, and other organizations created a simple superconducting diode they claim could transfer current through electronic devices much more efficiently than is possible today.

Upcoming events

  • 2023 Flash Memory Conference & Expo – August 8-10 (Santa Clara, CA)
  • DARPA: Electronics Resurgence Initiative (ERI) – August 22-24 (Seattle, WA)
  • Hot Chips 2023 – August 27-29 (Hybrid online & Stanford, CA)
  • NVMTS 2023: Non-Volatile Memory Technology Symposium – August 30-September 1 (Leuven, Belgium)
  • IEEE International System-on-Chip Conference (SOCC): SoCs/ SiPs for Edge Intelligence & Accelerated Computing – September 5-8 (Santa Clara, CA)
  • AI Hardware Summit 2023 – September 12-14 (Santa Clara, CA)
  • DVCON Taiwan – September 7 (Hsinchu, Taiwan)
  • AI Hardware Summit 2023 – September 12-14 (Santa Clara, CA)
  • DVCON India: Design & Verification Conference & Exhibition – September 13-14 (Bangalore, India)
  • More events and webinars

Further reading

Check out the latest Low Power-High Performance and Systems & Design newsletters for these highlights and more:

  • Improving Performance And Lowering Power In Automotive
  • Getting Rid Of Heat In Chips
  • HBM’s Future: Necessary But Expensive
  • Shift Left, Extend Right, Stretch Sideways
  • The Good And Bad Of Chip Design On Cloud
  • Large-Scale Integration’s Future Depends On Modeling
  • Using AI To Close Coverage Gaps

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