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EVs Raise Energy, Power, And Thermal IC Design Challenges


The transition to electric vehicles is putting pressure on power grids to produce more energy and on vehicles to use that energy much more efficiently, creating a gargantuan set of challenges that will affect every segment of the automotive world, the infrastructure that supports it, and the chips that are required to make all of this work. From a semiconductor standpoint, improvements in th... » read more

Memory Design Shift Left To Achieve Faster Development Turnaround Time


As noted in a recent blog post, demand for more memory is a common theme for many semiconductor-driven products. Artificial intelligence (AI) and machine learning (ML) algorithms rely on fast, plentiful memory for real-time performance, and storage at all levels is key to data-intensive applications. General-purpose memory devices are giving way to customized chips for applications such as AI, ... » read more

Turning MBSE Inside-Out For An RF EDA Shift Left


Model-based systems engineering (MBSE) focuses on creating and exploiting domain models in a digital modeling language. RF system designers trying to use generic MBSE tools soon run into a problem: developing behavioral models. Without high-fidelity models, simulations miss real-world results, and a digital twin won’t be worth the effort. What’s helping RF teams get engineering tasks done i... » read more

Power Now First-Order Concern In More Markets


Concerns about energy and power efficiency are becoming as important as performance in markets where traditionally there has been a significant gap, setting the stage for significant shifts in both chip architectures and in how those ICs are designed in the first place. This shift can be seen in a growing number of applications and vertical segments. It includes mobile devices, where batteri... » read more

Product Lifecycle Management For Semiconductors


Product lifecycle management (PLM) and the semiconductor industry have always been separate, but pressure is growing to integrate them. Automotive, IIoT, medical, and other industries see that as the only way to manage many aspects of their business, and as it stands, semiconductors are a large black box in that methodology. The technology space is driven by a mix of top down and bottom-up p... » read more

A New Vision For Memory Chip Design And Verification


Discrete memory chips are arguably the most visible reminder of the opportunities and challenges for advanced semiconductor design. They are manufactured in huge quantities, becoming key drivers for new technology nodes and new fabrication processes. Price fluctuations have a major impact on the financial health of the electronics industry, and any shortages can shut down the manufacturing line... » read more

‘Hug The Debug’ – Before It’s Too Late


Though the term “shift-left” originated in the software industry, its importance is often cited in the hardware (semiconductor) industry where the end-product (chip) costs are skyrocketing. The increase in cost is driven by a global chip shortage, especially in the automotive industry. Manufacturing a robust chip is a long, iterative process that may require many re-spins. Shift-left refers... » read more

Shifting Left: Early Multi Physics Analysis For STCO


With the economics of transistor scaling no longer universally applicable, the industry is turning to innovative packaging technologies to support system scaling demands and achieve lower system cost. This has led to the emergence of a system technology co-optimization (STCO) approach, in which an SoC is disaggregated into smaller modules (also known as chiplets) that can be asynchronously desi... » read more

Customer-Developed, Hyper-Convergent Design Flows Are Now Possible


We all know the days of sequential, compartmentalized chip design are over. In advanced technology nodes, placement impacts performance, performance impacts power, and routing impacts everything. The way to manage these challenges is to interleave design tasks. For example, provide information on late-stage routing to early-stage synthesis tools to improve convergence. This technique is commonl... » read more

DFT For SoCs Is Last, First, And Everywhere In Between


Back in the dawn of time, IC test was the last task in the design flow. First, you designed the chip and then you wrote the functional test program to verify it performed as expected after manufacturing. Without much effort, some portion of the functional test program was often reused as the manufacturing test to determine that the silicon was defect-free. Fast forward to today and things ha... » read more

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