A Flexible Cluster Tool Simulation Framework With Wafer Batch Dispatching Time Recommendation

By UMC - 19 Dec, 2023 - Comments: 0

The semiconductor manufacturing process consists of multiple steps and is usually time-consuming. Information like the turnaround time of a certain batch of wafers can be very useful for manufacturing engineers. A simulation model of manufacturing process can help predict the performance of manufacturing process efficiently, which is very beneficial to the manufacturing engineers. The simulatio... » read more

Innovative Dual Mark Design For Alignment Verification And Process Monitoring In Advanced Lithography

By UMC - 21 Jul, 2021 - Comments: 0

Improving on product overlay is one of the key challenges when shrinking technology nodes in semiconductor manufacturing. . . . With smart placement of alignment mark pairs in the X and Y direction, it is possible to determine intra-wafer distortion wafer-by-wafer. Both the measurement and modeled results are applied directly as a feed-forward correction to enable wafer level control. In this p... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 04 Jun, 2021 - Comments: 0

Pervasive computing — IoT, edge, cloud, data center, and back To simplify IoT workflows, Arm announced that it is putting parts of its Common Microcontroller Software Interface Standard (CMSIS) into an open project called Open-CMSIS-Pack. The CMSIS is a vendor-independent abstraction layer for MCUs, especially Arm Cortex-M processors, that makes it possible for developers to deal with softwa... » read more

Knowledge Centers
Entities, people and technologies explored

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: United Microelectronics Corporation

A Flexible Cluster Tool Simulation Framework With Wafer Batch Dispatching Time Recommendation

Innovative Dual Mark Design For Alignment Verification And Process Monitoring In Advanced Lithography

Week In Review: Auto, Security, Pervasive Computing

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