ISA Extension For Low-Precision NN Training On RISC-V Cores


New technical paper titled "MiniFloat-NN and ExSdotp: An ISA Extension and a Modular Open Hardware Unit for Low-Precision Training on RISC-V cores" from researchers at IIS, ETH Zurich; DEI, University of Bologna; and Axelera AI. Abstract "Low-precision formats have recently driven major breakthroughs in neural network (NN) training and inference by reducing the memory footprint of the N... » read more

Power/Performance Bits: Nov. 9


Integrated transistor cooling Researchers at Ecole Polytechnique Fédérale de Lausanne (EPFL) created a single chip that combines a transistor and microfluidic cooling system for more efficient transistor heat management. The team focused on a co-design approach for the electrical and mechanical aspects of the chip, bringing the electronics and cooling design together and aiming to extract... » read more

Internet of FD-SOI Things?


Are fully-depleted silicon-on-insulator (FD-SOI) wafers having a moment? Certainly SOI wafers are not new. Soitec’s SmartCut layer transfer technology was patented in 1994, and wafers with implanted oxide layers were available before that. Still, adoption of SOI wafers has been limited. Though they offer improved device isolation and reduced parasitics, the increased wafer cost has been an ob... » read more

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