Manufacturing Bits: June 18

By Mark LaPedus - 18 Jun, 2019 - Comments: 0

Making microvias in packages At the recent IEEE Electronic Components and Technology Conference (ECTC) in Las Vegas, Georgia Institute of Technology, Tokyo Ohka Kogyo (TOK) and Panasonic presented a paper on a technology that enables ultra-small microvias for advanced IC packages. Researchers demonstrated a picosecond UV laser technology as well as materials, which enabled 2μm to 7μm vias... » read more

Week in Review: IoT, Security, Auto

By Jeff Dorsch - 08 Mar, 2019 - Comments: 0

Internet of Things Dialog Semiconductor is shifting its product portfolio away from smartphones following its pending $600 million deal with Apple. The chip company is looking toward connected-health products and video-game consoles for future growth. The connected-health devices, developed in collaboration with pharmaceutical firms, would monitor blood pressure and check glucose levels, accor... » read more

System Bits: Jan. 29

By Jeff Dorsch - 29 Jan, 2019 - Comments: 0

Quantum physics make hybrid semiconductors glow Hybrid semiconducting materials have quantum properties capable of bringing significant changes to light-emitting diode lighting and monitors, along with photovoltaic solar cells, researchers at the Georgia Institute of Technology report. Physical chemists worked with halide organic-inorganic perovskite (HOIP), which combines a crystal lattice wi... » read more

Manufacturing Bits: Aug. 15

By Mark LaPedus - 15 Aug, 2017 - Comments: 0

Self-collapse lithography The University of California at Los Angeles (UCLA) has developed a technology called self-collapse lithography. The technology, reported in the journal Nano Letters, resembles the combination of nanoimprint, selective removal and a chemical lift-off process. More specifically, though, the technology provides insights into patterning using a chemical lift-off lith... » read more

Knowledge Centers
Entities, people and technologies explored

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: University of California at Los Angeles

Manufacturing Bits: June 18

Week in Review: IoT, Security, Auto

System Bits: Jan. 29

Manufacturing Bits: Aug. 15

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Entities, people and technologies explored