Manufacturing Bits: June 18

Making microvias in packages; flexible fan-out.


Making microvias in packages
At the recent IEEE Electronic Components and Technology Conference (ECTC) in Las Vegas, Georgia Institute of Technology, Tokyo Ohka Kogyo (TOK) and Panasonic presented a paper on a technology that enables ultra-small microvias for advanced IC packages.

Researchers demonstrated a picosecond UV laser technology as well as materials, which enabled 2μm to 7μm vias for 2.5D interposers and high-density fan-out packages. A package incorporates a device with various routing layers. Microvias are tiny holes or vias, which connect one layer with another in a package.

There are several ways to make vias. The system used in this study is a UV laser system from ESI. The system, called Corner Stone, uses a coherent solid-state laser. It is a 355nm wavelength system that generates picosecond pulses at 80MHz with an output power of 16 watts, according to researchers.

This system created vias using an ablation or drilling process. A laser forms the vias. Using the UV laser tool, microvias with a minimum diameter of <7μm were fabricated in 5μm thick Ajinomoto Build-up Film (ABF) technology. A 7μm thick low-stress dielectric film from Panasonic was also used.

“This is the first demonstration of very small microvias (<7μm) in polymer dielectrics using UV laser ablation,” said Fuhan Liu from Georgia Institute of Technology in a paper. “The motivation of this work is to address the high RDL interconnect density requirements for 2.5D interposer and high-density fan-out packages. The next generation of low-cost, ultra-small microvias will (1) Increase the RDL I/O density, (2) Meet fine bump pitch requirements, (3) Reduce the metal layer count for package substrate RDL, (4) Fill the gap between semiconductor back-end-of-line (BEOL) process and semi-additive process (SAP) and thereby (5) Improve the packaging performance at lower costs.”

Flexible fan-out
At ECTC, the University of California at Los Angeles (UCLA) described more details about a fan-out wafer-level packaging integration process using a flexible substrate.

In the works for some time, UCLA refers to its flexible substrate technology as FlexTrate. In its latest work, researches demonstrated a foldable display with LED dielets.

Flexible hybrid electronics are gaining steam in the market. The technology enables the integration of dies on a flexible organic substrate. But there are some challenges with the technology.

Instead of traditional technology, UCLA uses a flexible elastomeric molding compound called polydimethylsiloxane (PDMS). PDMS enables the system to bend with an extreme radius. Then, dies are embedded in PDMS. The technology does not require a bonding process.

This approach uses a modular dielet approach. Dielets are a similar concept to chiplets, which is a way of integrating multiple dies in a package or system. The basic idea is that you have a menu of modular chips, or chiplets, in a library. Then, you assemble chiplets in a package and connect them using a die-to-die interconnect scheme.

In its latest work, UCLA demonstrated a large area (37mm x 52mm) foldable 7-segment display. The display integrates LED dielets based on an indium- gallium-nitride (InGaN) technology. The dielets are connected using 40μm pitch vertically corrugated copper interconnects.

“Through FlexTrate, we can target wearable and implantable applications that require high-performance, flexible systems, such as multi-channel surface electromyography (sEMG) systems, optogenetics for neural implants, and so on,” said Arsalan Alam from UCLA, in a paper at ECTC.

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